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semihosting: Change common-semi API to be architecture-independent 

The public API is now defined in
hw/semihosting/common-semi.h. do_common_semihosting takes CPUState *
instead of CPUARMState *. All internal functions have been renamed
common_semi_ instead of arm_semi_ or arm_. Aside from the API change,
there are no functional changes in this patch.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20210107170717.2098982-3-keithp@keithp.com>
Message-Id: <20210108224256.2321-14-alex.bennee@linaro.org>
This commit is contained in:
Keith Packard 2021-01-08 22:42:49 +00:00 committed by Alex Bennée
parent 56b5170c87
commit 0bb446d8b0
7 changed files with 59 additions and 19 deletions
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16
hw/semihosting/arm-compat-semi.c
View File

@ -1,10 +1,14 @@
/*
* Arm "Angel" semihosting syscalls
* Semihosting support for systems modeled on the Arm "Angel"
* semihosting syscalls design.
*
* Copyright (c) 2005, 2007 CodeSourcery.
* Copyright (c) 2019 Linaro
* Written by Paul Brook.
*
* Copyright © 2020 by Keith Packard <keithp@keithp.com>
* Adapted for systems other than ARM, including RISC-V, by Keith Packard
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@ -373,12 +377,12 @@ static target_ulong arm_gdb_syscall(ARMCPU *cpu, gdb_syscall_complete_cb cb,
* do anything with its return value, because it is not necessarily
* the result of the syscall, but could just be the old value of X0.
* The only thing safe to do with this is that the callers of
* do_arm_semihosting() will write it straight back into X0.
* do_common_semihosting() will write it straight back into X0.
* (In linux-user mode, the callback will have happened before
* gdb_do_syscallv() returns.)
*
* We should tidy this up so neither this function nor
* do_arm_semihosting() return a value, so the mistake of
* do_common_semihosting() return a value, so the mistake of
* doing something with the return value is not possible to make.
*/
@ -675,10 +679,10 @@ static const GuestFDFunctions guestfd_fns[] = {
* leave the register unchanged. We use 0xdeadbeef as the return value
* when there isn't a defined return value for the call.
*/
target_ulong do_arm_semihosting(CPUARMState *env)
target_ulong do_common_semihosting(CPUState *cs)
{
ARMCPU *cpu = env_archcpu(env);
CPUState *cs = env_cpu(env);
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
target_ulong args;
target_ulong arg0, arg1, arg2, arg3;
char * s;

36
hw/semihosting/common-semi.h Normal file
View File

@ -0,0 +1,36 @@
/*
* Semihosting support for systems modeled on the Arm "Angel"
* semihosting syscalls design.
*
* Copyright (c) 2005, 2007 CodeSourcery.
* Copyright (c) 2019 Linaro
* Written by Paul Brook.
*
* Copyright © 2020 by Keith Packard <keithp@keithp.com>
* Adapted for systems other than ARM, including RISC-V, by Keith Packard
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see <http://www.gnu.org/licenses/>.
*
* ARM Semihosting is documented in:
* Semihosting for AArch32 and AArch64 Release 2.0
* https://static.docs.arm.com/100863/0200/semihosting.pdf
*
*/
#ifndef COMMON_SEMI_H
#define COMMON_SEMI_H
target_ulong do_common_semihosting(CPUState *cs);
#endif /* COMMON_SEMI_H */

3
linux-user/aarch64/cpu_loop.c
View File

@ -22,6 +22,7 @@
#include "qemu.h"
#include "cpu_loop-common.h"
#include "qemu/guest-random.h"
#include "hw/semihosting/common-semi.h"
#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r = get_user_u32((x), (gaddr)); \
@ -129,7 +130,7 @@ void cpu_loop(CPUARMState *env)
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
case EXCP_SEMIHOST:
env->xregs[0] = do_arm_semihosting(env);
env->xregs[0] = do_common_semihosting(cs);
env->pc += 4;
break;
case EXCP_YIELD:

3
linux-user/arm/cpu_loop.c
View File

@ -22,6 +22,7 @@
#include "qemu.h"
#include "elf.h"
#include "cpu_loop-common.h"
#include "hw/semihosting/common-semi.h"
#define get_user_code_u32(x, gaddr, env) \
({ abi_long __r = get_user_u32((x), (gaddr)); \
@ -421,7 +422,7 @@ void cpu_loop(CPUARMState *env)
}
break;
case EXCP_SEMIHOST:
env->regs[0] = do_arm_semihosting(env);
env->regs[0] = do_common_semihosting(cs);
env->regs[15] += env->thumb ? 2 : 4;
break;
case EXCP_INTERRUPT:

8
target/arm/cpu.h
View File

@ -1068,14 +1068,6 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o,
static inline void aarch64_add_sve_properties(Object *obj) { }
#endif
#if !defined(CONFIG_TCG)
static inline target_ulong do_arm_semihosting(CPUARMState *env)
{
g_assert_not_reached();
}
#else
target_ulong do_arm_semihosting(CPUARMState *env);
#endif
void aarch64_sync_32_to_64(CPUARMState *env);
void aarch64_sync_64_to_32(CPUARMState *env);

5
target/arm/helper.c
View File

@ -34,6 +34,7 @@
#ifdef CONFIG_TCG
#include "arm_ldst.h"
#include "exec/cpu_ldst.h"
#include "hw/semihosting/common-semi.h"
#endif
#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
@ -9875,13 +9876,13 @@ static void handle_semihosting(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%" PRIx64 "\n",
env->xregs[0]);
env->xregs[0] = do_arm_semihosting(env);
env->xregs[0] = do_common_semihosting(cs);
env->pc += 4;
} else {
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%x\n",
env->regs[0]);
env->regs[0] = do_arm_semihosting(env);
env->regs[0] = do_common_semihosting(cs);
env->regs[15] += env->thumb ? 2 : 4;
}
}

7
target/arm/m_helper.c
View File

@ -31,6 +31,7 @@
#ifdef CONFIG_TCG
#include "arm_ldst.h"
#include "exec/cpu_ldst.h"
#include "hw/semihosting/common-semi.h"
#endif
static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
@ -2306,7 +2307,11 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
qemu_log_mask(CPU_LOG_INT,
"...handling as semihosting call 0x%x\n",
env->regs[0]);
env->regs[0] = do_arm_semihosting(env);
#ifdef CONFIG_TCG
env->regs[0] = do_common_semihosting(cs);
#else
g_assert_not_reached();
#endif
env->regs[15] += env->thumb ? 2 : 4;
return;
case EXCP_BKPT: