semihosting: Change common-semi API to be architecture-independent
The public API is now defined in hw/semihosting/common-semi.h. do_common_semihosting takes CPUState * instead of CPUARMState *. All internal functions have been renamed common_semi_ instead of arm_semi_ or arm_. Aside from the API change, there are no functional changes in this patch. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210107170717.2098982-3-keithp@keithp.com> Message-Id: <20210108224256.2321-14-alex.bennee@linaro.org>
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@ -1,10 +1,14 @@
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/*
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/*
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* Arm "Angel" semihosting syscalls
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* Semihosting support for systems modeled on the Arm "Angel"
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* semihosting syscalls design.
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*
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*
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* Copyright (c) 2005, 2007 CodeSourcery.
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* Copyright (c) 2005, 2007 CodeSourcery.
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* Copyright (c) 2019 Linaro
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* Copyright (c) 2019 Linaro
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* Written by Paul Brook.
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* Written by Paul Brook.
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*
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*
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* Copyright © 2020 by Keith Packard <keithp@keithp.com>
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* Adapted for systems other than ARM, including RISC-V, by Keith Packard
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*
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* This program is free software; you can redistribute it and/or modify
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* the Free Software Foundation; either version 2 of the License, or
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@ -373,12 +377,12 @@ static target_ulong arm_gdb_syscall(ARMCPU *cpu, gdb_syscall_complete_cb cb,
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* do anything with its return value, because it is not necessarily
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* do anything with its return value, because it is not necessarily
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* the result of the syscall, but could just be the old value of X0.
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* the result of the syscall, but could just be the old value of X0.
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* The only thing safe to do with this is that the callers of
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* The only thing safe to do with this is that the callers of
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* do_arm_semihosting() will write it straight back into X0.
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* do_common_semihosting() will write it straight back into X0.
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* (In linux-user mode, the callback will have happened before
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* (In linux-user mode, the callback will have happened before
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* gdb_do_syscallv() returns.)
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* gdb_do_syscallv() returns.)
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*
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*
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* We should tidy this up so neither this function nor
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* We should tidy this up so neither this function nor
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* do_arm_semihosting() return a value, so the mistake of
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* do_common_semihosting() return a value, so the mistake of
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* doing something with the return value is not possible to make.
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* doing something with the return value is not possible to make.
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*/
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*/
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@ -675,10 +679,10 @@ static const GuestFDFunctions guestfd_fns[] = {
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* leave the register unchanged. We use 0xdeadbeef as the return value
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* leave the register unchanged. We use 0xdeadbeef as the return value
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* when there isn't a defined return value for the call.
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* when there isn't a defined return value for the call.
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*/
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*/
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target_ulong do_arm_semihosting(CPUARMState *env)
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target_ulong do_common_semihosting(CPUState *cs)
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{
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{
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ARMCPU *cpu = env_archcpu(env);
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ARMCPU *cpu = ARM_CPU(cs);
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CPUState *cs = env_cpu(env);
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CPUARMState *env = &cpu->env;
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target_ulong args;
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target_ulong args;
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target_ulong arg0, arg1, arg2, arg3;
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target_ulong arg0, arg1, arg2, arg3;
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char * s;
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char * s;
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@ -0,0 +1,36 @@
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/*
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* Semihosting support for systems modeled on the Arm "Angel"
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* semihosting syscalls design.
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*
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* Copyright (c) 2005, 2007 CodeSourcery.
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* Copyright (c) 2019 Linaro
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* Written by Paul Brook.
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*
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* Copyright © 2020 by Keith Packard <keithp@keithp.com>
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* Adapted for systems other than ARM, including RISC-V, by Keith Packard
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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* ARM Semihosting is documented in:
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* Semihosting for AArch32 and AArch64 Release 2.0
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* https://static.docs.arm.com/100863/0200/semihosting.pdf
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*
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*/
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#ifndef COMMON_SEMI_H
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#define COMMON_SEMI_H
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target_ulong do_common_semihosting(CPUState *cs);
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#endif /* COMMON_SEMI_H */
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@ -22,6 +22,7 @@
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#include "qemu.h"
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#include "qemu.h"
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#include "cpu_loop-common.h"
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#include "cpu_loop-common.h"
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#include "qemu/guest-random.h"
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#include "qemu/guest-random.h"
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#include "hw/semihosting/common-semi.h"
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#define get_user_code_u32(x, gaddr, env) \
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#define get_user_code_u32(x, gaddr, env) \
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({ abi_long __r = get_user_u32((x), (gaddr)); \
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({ abi_long __r = get_user_u32((x), (gaddr)); \
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@ -129,7 +130,7 @@ void cpu_loop(CPUARMState *env)
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
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break;
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break;
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case EXCP_SEMIHOST:
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case EXCP_SEMIHOST:
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env->xregs[0] = do_arm_semihosting(env);
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env->xregs[0] = do_common_semihosting(cs);
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env->pc += 4;
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env->pc += 4;
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break;
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break;
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case EXCP_YIELD:
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case EXCP_YIELD:
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@ -22,6 +22,7 @@
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#include "qemu.h"
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#include "qemu.h"
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#include "elf.h"
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#include "elf.h"
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#include "cpu_loop-common.h"
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#include "cpu_loop-common.h"
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#include "hw/semihosting/common-semi.h"
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#define get_user_code_u32(x, gaddr, env) \
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#define get_user_code_u32(x, gaddr, env) \
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({ abi_long __r = get_user_u32((x), (gaddr)); \
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({ abi_long __r = get_user_u32((x), (gaddr)); \
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@ -421,7 +422,7 @@ void cpu_loop(CPUARMState *env)
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}
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}
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break;
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break;
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case EXCP_SEMIHOST:
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case EXCP_SEMIHOST:
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env->regs[0] = do_arm_semihosting(env);
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env->regs[0] = do_common_semihosting(cs);
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env->regs[15] += env->thumb ? 2 : 4;
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env->regs[15] += env->thumb ? 2 : 4;
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break;
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break;
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case EXCP_INTERRUPT:
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case EXCP_INTERRUPT:
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@ -1068,14 +1068,6 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o,
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static inline void aarch64_add_sve_properties(Object *obj) { }
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static inline void aarch64_add_sve_properties(Object *obj) { }
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#endif
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#endif
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#if !defined(CONFIG_TCG)
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static inline target_ulong do_arm_semihosting(CPUARMState *env)
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{
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g_assert_not_reached();
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}
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#else
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target_ulong do_arm_semihosting(CPUARMState *env);
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#endif
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void aarch64_sync_32_to_64(CPUARMState *env);
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void aarch64_sync_32_to_64(CPUARMState *env);
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void aarch64_sync_64_to_32(CPUARMState *env);
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void aarch64_sync_64_to_32(CPUARMState *env);
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@ -34,6 +34,7 @@
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#ifdef CONFIG_TCG
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#ifdef CONFIG_TCG
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#include "arm_ldst.h"
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#include "arm_ldst.h"
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#include "exec/cpu_ldst.h"
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#include "exec/cpu_ldst.h"
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#include "hw/semihosting/common-semi.h"
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#endif
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#endif
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#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
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#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
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@ -9875,13 +9876,13 @@ static void handle_semihosting(CPUState *cs)
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qemu_log_mask(CPU_LOG_INT,
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qemu_log_mask(CPU_LOG_INT,
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"...handling as semihosting call 0x%" PRIx64 "\n",
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"...handling as semihosting call 0x%" PRIx64 "\n",
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env->xregs[0]);
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env->xregs[0]);
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env->xregs[0] = do_arm_semihosting(env);
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env->xregs[0] = do_common_semihosting(cs);
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env->pc += 4;
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env->pc += 4;
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} else {
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} else {
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qemu_log_mask(CPU_LOG_INT,
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qemu_log_mask(CPU_LOG_INT,
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"...handling as semihosting call 0x%x\n",
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"...handling as semihosting call 0x%x\n",
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env->regs[0]);
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env->regs[0]);
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env->regs[0] = do_arm_semihosting(env);
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env->regs[0] = do_common_semihosting(cs);
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env->regs[15] += env->thumb ? 2 : 4;
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env->regs[15] += env->thumb ? 2 : 4;
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}
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}
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}
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}
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@ -31,6 +31,7 @@
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#ifdef CONFIG_TCG
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#ifdef CONFIG_TCG
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#include "arm_ldst.h"
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#include "arm_ldst.h"
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#include "exec/cpu_ldst.h"
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#include "exec/cpu_ldst.h"
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#include "hw/semihosting/common-semi.h"
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#endif
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#endif
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static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
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static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
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qemu_log_mask(CPU_LOG_INT,
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qemu_log_mask(CPU_LOG_INT,
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"...handling as semihosting call 0x%x\n",
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"...handling as semihosting call 0x%x\n",
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env->regs[0]);
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env->regs[0]);
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env->regs[0] = do_arm_semihosting(env);
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#ifdef CONFIG_TCG
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env->regs[0] = do_common_semihosting(cs);
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#else
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g_assert_not_reached();
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#endif
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env->regs[15] += env->thumb ? 2 : 4;
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env->regs[15] += env->thumb ? 2 : 4;
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return;
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return;
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case EXCP_BKPT:
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case EXCP_BKPT:
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