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Fix most warnings (errors with -Werror) when debugging is enabled 

I used the following command to enable debugging:
perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/*

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-07-20 17:19:25 +00:00
parent c0a2a096a0
commit 0bf9e31af1
21 changed files with 95 additions and 103 deletions
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4
block/qcow2-refcount.c
View File

@ -277,7 +277,7 @@ static int update_refcount(BlockDriverState *bs,
int first_index = -1, last_index = -1;
#ifdef DEBUG_ALLOC2
printf("update_refcount: offset=%lld size=%lld addend=%d\n",
printf("update_refcount: offset=%" PRId64 " size=%" PRId64 " addend=%d\n",
offset, length, addend);
#endif
if (length <= 0)
@ -380,7 +380,7 @@ retry:
goto retry;
}
#ifdef DEBUG_ALLOC2
printf("alloc_clusters: size=%lld -> %lld\n",
printf("alloc_clusters: size=%" PRId64 " -> %" PRId64 "\n",
size,
(s->free_cluster_index - nb_clusters) << s->cluster_bits);
#endif

1
block/raw-posix.c
View File

@ -24,6 +24,7 @@
#include "qemu-common.h"
#include "qemu-timer.h"
#include "qemu-char.h"
#include "qemu-log.h"
#include "block_int.h"
#include "module.h"
#ifdef CONFIG_AIO

4
buffered_file.c
View File

@ -113,7 +113,7 @@ static int buffered_put_buffer(void *opaque, const uint8_t *buf, int64_t pos, in
int offset = 0;
ssize_t ret;
dprintf("putting %ld bytes at %Ld\n", size, pos);
dprintf("putting %d bytes at %" PRId64 "\n", size, pos);
if (s->has_error) {
dprintf("flush when error, bailing\n");
@ -151,7 +151,7 @@ static int buffered_put_buffer(void *opaque, const uint8_t *buf, int64_t pos, in
}
if (offset >= 0) {
dprintf("buffering %ld bytes\n", size - offset);
dprintf("buffering %d bytes\n", size - offset);
buffered_append(s, buf + offset, size - offset);
offset = size;
}

25
exec.c
View File

@ -655,7 +655,8 @@ static void tb_invalidate_check(target_ulong address)
for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {
if (!(address + TARGET_PAGE_SIZE <= tb->pc ||
address >= tb->pc + tb->size)) {
printf("ERROR invalidate: address=%08lx PC=%08lx size=%04x\n",
printf("ERROR invalidate: address=" TARGET_FMT_lx
" PC=%08lx size=%04x\n",
address, (long)tb->pc, tb->size);
}
}
@ -680,26 +681,6 @@ static void tb_page_check(void)
}
}
static void tb_jmp_check(TranslationBlock *tb)
{
TranslationBlock *tb1;
unsigned int n1;
/* suppress any remaining jumps to this TB */
tb1 = tb->jmp_first;
for(;;) {
n1 = (long)tb1 & 3;
tb1 = (TranslationBlock *)((long)tb1 & ~3);
if (n1 == 2)
break;
tb1 = tb1->jmp_next[n1];
}
/* check end of list */
if (tb1 != tb) {
printf("ERROR: jmp_list from 0x%08lx\n", (long)tb);
}
}
#endif
/* invalidate one TB */
@ -2939,7 +2920,7 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
idx = SUBPAGE_IDX(start);
eidx = SUBPAGE_IDX(end);
#if defined(DEBUG_SUBPAGE)
printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %d\n", __func__,
printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %ld\n", __func__,
mmio, start, end, idx, eidx, memory);
#endif
memory >>= IO_MEM_SHIFT;

5
hw/cirrus_vga.c
View File

@ -2029,7 +2029,7 @@ static uint32_t cirrus_vga_mem_readb(void *opaque, target_phys_addr_t addr)
} else {
val = 0xff;
#ifdef DEBUG_CIRRUS
printf("cirrus: mem_readb %06x\n", addr);
printf("cirrus: mem_readb " TARGET_FMT_plx "\n", addr);
#endif
}
return val;
@ -2124,7 +2124,8 @@ static void cirrus_vga_mem_writeb(void *opaque, target_phys_addr_t addr,
}
} else {
#ifdef DEBUG_CIRRUS
printf("cirrus: mem_writeb %06x value %02x\n", addr, mem_value);
printf("cirrus: mem_writeb " TARGET_FMT_plx " value %02x\n", addr,
mem_value);
#endif
}
}

1
hw/i8259.c
View File

@ -25,6 +25,7 @@
#include "pc.h"
#include "isa.h"
#include "monitor.h"
#include "qemu-timer.h"
/* debug PIC */
//#define DEBUG_PIC

31
hw/openpic.c
View File

@ -592,7 +592,7 @@ static void openpic_gbl_write (void *opaque, target_phys_addr_t addr, uint32_t v
IRQ_dst_t *dst;
int idx;
DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
#if defined TARGET_WORDS_BIGENDIAN
@ -651,7 +651,7 @@ static uint32_t openpic_gbl_read (void *opaque, target_phys_addr_t addr)
openpic_t *opp = opaque;
uint32_t retval;
DPRINTF("%s: addr %08x\n", __func__, addr);
DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@ -824,7 +824,7 @@ static void openpic_cpu_write (void *opaque, target_phys_addr_t addr, uint32_t v
IRQ_dst_t *dst;
int idx, s_IRQ, n_IRQ;
DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
#if defined TARGET_WORDS_BIGENDIAN
@ -886,7 +886,7 @@ static uint32_t openpic_cpu_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx, n_IRQ;
DPRINTF("%s: addr %08x\n", __func__, addr);
DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@ -1264,8 +1264,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
static void mpic_irq_raise(openpic_t *mpp, int n_CPU, IRQ_src_t *src)
{
int n_ci = IDR_CI0 - n_CPU;
DPRINTF("%s: cpu:%d irq:%d (testbit idr:%x ci:%d)\n", __func__,
n_CPU, n_IRQ, mpp->src[n_IRQ].ide, n_ci);
if(test_bit(&src->ide, n_ci)) {
qemu_irq_raise(mpp->dst[n_CPU].irqs[OPENPIC_OUTPUT_CINT]);
}
@ -1313,7 +1312,7 @@ static void mpic_timer_write (void *opaque, target_phys_addr_t addr, uint32_t va
openpic_t *mpp = opaque;
int idx, cpu;
DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
addr &= 0xFFFF;
@ -1347,7 +1346,7 @@ static uint32_t mpic_timer_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx, cpu;
DPRINTF("%s: addr %08x\n", __func__, addr);
DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@ -1382,7 +1381,7 @@ static void mpic_src_ext_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_EXT_IRQ;
DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@ -1405,7 +1404,7 @@ static uint32_t mpic_src_ext_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_EXT_IRQ;
DPRINTF("%s: addr %08x\n", __func__, addr);
DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@ -1432,7 +1431,7 @@ static void mpic_src_int_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_INT_IRQ;
DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@ -1455,7 +1454,7 @@ static uint32_t mpic_src_int_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_INT_IRQ;
DPRINTF("%s: addr %08x\n", __func__, addr);
DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@ -1482,7 +1481,7 @@ static void mpic_src_msg_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_MSG_IRQ;
DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@ -1505,7 +1504,7 @@ static uint32_t mpic_src_msg_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_MSG_IRQ;
DPRINTF("%s: addr %08x\n", __func__, addr);
DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;
@ -1532,7 +1531,7 @@ static void mpic_src_msi_write (void *opaque, target_phys_addr_t addr,
openpic_t *mpp = opaque;
int idx = MPIC_MSI_IRQ;
DPRINTF("%s: addr %08x <= %08x\n", __func__, addr, val);
DPRINTF("%s: addr " TARGET_FMT_plx " <= %08x\n", __func__, addr, val);
if (addr & 0xF)
return;
@ -1554,7 +1553,7 @@ static uint32_t mpic_src_msi_read (void *opaque, target_phys_addr_t addr)
uint32_t retval;
int idx = MPIC_MSI_IRQ;
DPRINTF("%s: addr %08x\n", __func__, addr);
DPRINTF("%s: addr " TARGET_FMT_plx "\n", __func__, addr);
retval = 0xFFFFFFFF;
if (addr & 0xF)
return retval;

3
hw/ppc_prep.c
View File

@ -60,7 +60,8 @@ do { \
} \
} while (0)
#elif defined (DEBUG_PPC_IO)
#define PPC_IO_DPRINTF(fmt, ...) qemu_log_mask(CPU_LOG_IOPORT, ## __VA_ARGS__)
#define PPC_IO_DPRINTF(fmt, ...) \
qemu_log_mask(CPU_LOG_IOPORT, fmt, ## __VA_ARGS__)
#else
#define PPC_IO_DPRINTF(fmt, ...) do { } while (0)
#endif

12
hw/scsi-disk.c
View File

@ -172,7 +172,7 @@ static void scsi_read_complete(void * opaque, int ret)
scsi_command_complete(r, STATUS_CHECK_CONDITION, SENSE_NO_SENSE);
return;
}
DPRINTF("Data ready tag=0x%x len=%d\n", r->tag, r->iov.iov_len);
DPRINTF("Data ready tag=0x%x len=%" PRId64 "\n", r->tag, r->iov.iov_len);
s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len);
}
@ -192,7 +192,7 @@ static void scsi_read_data(SCSIDevice *d, uint32_t tag)
return;
}
if (r->sector_count == (uint32_t)-1) {
DPRINTF("Read buf_len=%d\n", r->iov.iov_len);
DPRINTF("Read buf_len=%" PRId64 "\n", r->iov.iov_len);
r->sector_count = 0;
s->completion(s->opaque, SCSI_REASON_DATA, r->tag, r->iov.iov_len);
return;
@ -777,7 +777,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
case 0x08:
case 0x28:
case 0x88:
DPRINTF("Read (sector %lld, count %d)\n", lba, len);
DPRINTF("Read (sector %" PRId64 ", count %d)\n", lba, len);
if (lba > s->max_lba)
goto illegal_lba;
r->sector = lba * s->cluster_size;
@ -786,7 +786,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
case 0x0a:
case 0x2a:
case 0x8a:
DPRINTF("Write (sector %lld, count %d)\n", lba, len);
DPRINTF("Write (sector %" PRId64 ", count %d)\n", lba, len);
if (lba > s->max_lba)
goto illegal_lba;
r->sector = lba * s->cluster_size;
@ -794,7 +794,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
is_write = 1;
break;
case 0x35:
DPRINTF("Synchronise cache (sector %d, count %d)\n", lba, len);
DPRINTF("Synchronise cache (sector %" PRId64 ", count %d)\n", lba, len);
bdrv_flush(s->bdrv);
break;
case 0x43:
@ -896,7 +896,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
r->iov.iov_len = 16;
break;
case 0x2f:
DPRINTF("Verify (sector %d, count %d)\n", lba, len);
DPRINTF("Verify (sector %" PRId64 ", count %d)\n", lba, len);
break;
default:
DPRINTF("Unknown SCSI command (%2.2x)\n", buf[0]);

8
hw/slavio_timer.c
View File

@ -197,8 +197,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
s->counthigh = val & (TIMER_MAX_COUNT64 >> 32);
s->reached = 0;
count = ((uint64_t)s->counthigh << 32) | s->count;
DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,
count);
DPRINTF("processor %d user timer set to %016" PRIx64 "\n",
s->slave_index, count);
if (s->timer)
ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
} else {
@ -223,8 +223,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
s->count = val & TIMER_MAX_COUNT64;
s->reached = 0;
count = ((uint64_t)s->counthigh) << 32 | s->count;
DPRINTF("processor %d user timer set to %016llx\n", s->slave_index,
count);
DPRINTF("processor %d user timer set to %016" PRIx64 "\n",
s->slave_index, count);
if (s->timer)
ptimer_set_count(s->timer, LIMIT_TO_PERIODS(s->limit - count));
} else

7
hw/sun4c_intctl.c
View File

@ -107,9 +107,9 @@ void sun4c_irq_info(Monitor *mon, void *opaque)
int64_t count;
monitor_printf(mon, "IRQ statistics:\n");
count = s->irq_count[i];
count = s->irq_count;
if (count > 0)
monitor_printf(mon, "%2d: %" PRId64 "\n", i, count);
monitor_printf(mon, " %" PRId64 "\n", count);
#endif
}
@ -121,7 +121,6 @@ static void sun4c_check_interrupts(void *opaque)
uint32_t pil_pending;
unsigned int i;
DPRINTF("pending %x disabled %x\n", pending, s->intregm_disabled);
pil_pending = 0;
if (s->pending && !(s->reg & 0x80000000)) {
for (i = 0; i < 8; i++) {
@ -156,7 +155,7 @@ static void sun4c_set_irq(void *opaque, int irq, int level)
if (pil > 0) {
if (level) {
#ifdef DEBUG_IRQ_COUNT
s->irq_count[pil]++;
s->irq_count++;
#endif
s->pending |= mask;
} else {

4
hw/usb-ohci.c
View File

@ -905,7 +905,7 @@ static int ohci_service_td(OHCIState *ohci, struct ohci_ed *ed)
flag_r = (td.flags & OHCI_TD_R) != 0;
#ifdef DEBUG_PACKET
dprintf(" TD @ 0x%.8x %u bytes %s r=%d cbp=0x%.8x be=0x%.8x\n",
dprintf(" TD @ 0x%.8x %" PRId64 " bytes %s r=%d cbp=0x%.8x be=0x%.8x\n",
addr, len, str, flag_r, td.cbp, td.be);
if (len > 0 && dir != OHCI_TD_DIR_IN) {
@ -1677,7 +1677,7 @@ static void usb_ohci_init(OHCIState *ohci, int num_ports, int devfn,
usb_bit_time = 1;
}
#endif
dprintf("usb-ohci: usb_bit_time=%lli usb_frame_time=%lli\n",
dprintf("usb-ohci: usb_bit_time=%" PRId64 " usb_frame_time=%" PRId64 "\n",
usb_frame_time, usb_bit_time);
}

2
hw/usb-uhci.c
View File

@ -72,7 +72,7 @@
#ifdef DEBUG
#define dprintf printf
const char *pid2str(int pid)
static const char *pid2str(int pid)
{
switch (pid) {
case USB_TOKEN_SETUP: return "SETUP";

12
hw/vga.c
View File

@ -799,7 +799,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
uint32_t write_mask, bit_mask, set_mask;
#ifdef DEBUG_VGA_MEM
printf("vga: [0x%x] = 0x%02x\n", addr, val);
printf("vga: [0x" TARGET_FMT_plx "] = 0x%02x\n", addr, val);
#endif
/* convert to VGA memory offset */
memory_map_mode = (s->gr[6] >> 2) & 3;
@ -832,7 +832,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
if (s->sr[2] & mask) {
s->vram_ptr[addr] = val;
#ifdef DEBUG_VGA_MEM
printf("vga: chain4: [0x%x]\n", addr);
printf("vga: chain4: [0x" TARGET_FMT_plx "]\n", addr);
#endif
s->plane_updated |= mask; /* only used to detect font change */
cpu_physical_memory_set_dirty(s->vram_offset + addr);
@ -845,7 +845,7 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
addr = ((addr & ~1) << 1) | plane;
s->vram_ptr[addr] = val;
#ifdef DEBUG_VGA_MEM
printf("vga: odd/even: [0x%x]\n", addr);
printf("vga: odd/even: [0x" TARGET_FMT_plx "]\n", addr);
#endif
s->plane_updated |= mask; /* only used to detect font change */
cpu_physical_memory_set_dirty(s->vram_offset + addr);
@ -919,10 +919,10 @@ void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
(((uint32_t *)s->vram_ptr)[addr] & ~write_mask) |
(val & write_mask);
#ifdef DEBUG_VGA_MEM
printf("vga: latch: [0x%x] mask=0x%08x val=0x%08x\n",
addr * 4, write_mask, val);
printf("vga: latch: [0x" TARGET_FMT_plx "] mask=0x%08x val=0x%08x\n",
addr * 4, write_mask, val);
#endif
cpu_physical_memory_set_dirty(s->vram_offset + (addr << 2));
cpu_physical_memory_set_dirty(s->vram_offset + (addr << 2));
}
}

16
linux-user/mmap.c
View File

@ -145,8 +145,8 @@ int target_mprotect(abi_ulong start, abi_ulong len, int prot)
int prot1, ret;
#ifdef DEBUG_MMAP
printf("mprotect: start=0x" TARGET_FMT_lx
"len=0x" TARGET_FMT_lx " prot=%c%c%c\n", start, len,
printf("mprotect: start=0x" TARGET_ABI_FMT_lx
"len=0x" TARGET_ABI_FMT_lx " prot=%c%c%c\n", start, len,
prot & PROT_READ ? 'r' : '-',
prot & PROT_WRITE ? 'w' : '-',
prot & PROT_EXEC ? 'x' : '-');
@ -331,8 +331,8 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot,
mmap_lock();
#ifdef DEBUG_MMAP
{
printf("mmap: start=0x" TARGET_FMT_lx
" len=0x" TARGET_FMT_lx " prot=%c%c%c flags=",
printf("mmap: start=0x" TARGET_ABI_FMT_lx
" len=0x" TARGET_ABI_FMT_lx " prot=%c%c%c flags=",
start, len,
prot & PROT_READ ? 'r' : '-',
prot & PROT_WRITE ? 'w' : '-',
@ -352,7 +352,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot,
printf("[MAP_TYPE=0x%x] ", flags & MAP_TYPE);
break;
}
printf("fd=%d offset=" TARGET_FMT_lx "\n", fd, offset);
printf("fd=%d offset=" TARGET_ABI_FMT_lx "\n", fd, offset);
}
#endif
@ -523,7 +523,7 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int prot,
page_set_flags(start, start + len, prot | PAGE_VALID);
the_end:
#ifdef DEBUG_MMAP
printf("ret=0x" TARGET_FMT_lx "\n", start);
printf("ret=0x" TARGET_ABI_FMT_lx "\n", start);
page_dump(stdout);
printf("\n");
#endif
@ -540,7 +540,9 @@ int target_munmap(abi_ulong start, abi_ulong len)
int prot, ret;
#ifdef DEBUG_MMAP
printf("munmap: start=0x%lx len=0x%lx\n", start, len);
printf("munmap: start=0x" TARGET_ABI_FMT_lx " len=0x"
TARGET_ABI_FMT_lx "\n",
start, len);
#endif
if (start & ~TARGET_PAGE_MASK)
return -EINVAL;

4
linux-user/signal.c
View File

@ -584,8 +584,8 @@ int do_sigaction(int sig, const struct target_sigaction *act,
return -EINVAL;
k = &sigact_table[sig - 1];
#if defined(DEBUG_SIGNAL)
fprintf(stderr, "sigaction sig=%d act=0x%08x, oact=0x%08x\n",
sig, (int)act, (int)oact);
fprintf(stderr, "sigaction sig=%d act=0x%p, oact=0x%p\n",
sig, act, oact);
#endif
if (oact) {
oact->_sa_handler = tswapl(k->_sa_handler);

2
linux-user/syscall.c
View File

@ -6977,7 +6977,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
}
fail:
#ifdef DEBUG
gemu_log(" = %ld\n", ret);
gemu_log(" = " TARGET_ABI_FMT_ld "\n", ret);
#endif
if(do_strace)
print_syscall_ret(num, ret);

3
qemu-tool.c
View File

@ -15,11 +15,14 @@
#include "monitor.h"
#include "sysemu.h"
#include "qemu-timer.h"
#include "qemu-log.h"
#include <sys/time.h>
QEMUClock *rt_clock;
FILE *logfile;
struct QEMUBH
{
QEMUBHFunc *cb;

20
target-ppc/helper.c
View File

@ -558,18 +558,18 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx,
}
if (ret < 0) {
#if defined(DEBUG_BATS)
if (IS_LOGGING) {
QEMU_LOG0("no BAT match for " ADDRX ":\n", virtual);
if (qemu_log_enabled()) {
LOG_BATS("no BAT match for " ADDRX ":\n", virtual);
for (i = 0; i < 4; i++) {
BATu = &BATut[i];
BATl = &BATlt[i];
BEPIu = *BATu & 0xF0000000;
BEPIl = *BATu & 0x0FFE0000;
bl = (*BATu & 0x00001FFC) << 15;
QEMU_LOG0("%s: %cBAT%d v " ADDRX " BATu " ADDRX
" BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n",
__func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
*BATu, *BATl, BEPIu, BEPIl, bl);
LOG_BATS("%s: %cBAT%d v " ADDRX " BATu " ADDRX
" BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n",
__func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual,
*BATu, *BATl, BEPIu, BEPIl, bl);
}
}
#endif
@ -860,8 +860,8 @@ void ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs)
slb->tmp = (vsid << 8) | (flags << 3);
LOG_SLB("%s: %d " ADDRX " - " ADDRX " => %016" PRIx64
" %08" PRIx32 "\n", __func__,
slb_nr, rb, rs, tmp64, tmp);
" %08" PRIx32 "\n", __func__,
slb_nr, rb, rs, slb->tmp64, slb->tmp);
slb_set_entry(env, slb_nr, slb);
}
@ -2445,7 +2445,7 @@ static always_inline void powerpc_excp (CPUState *env,
tlb_miss:
#if defined (DEBUG_SOFTWARE_TLB)
if (qemu_log_enabled()) {
const unsigned char *es;
const char *es;
target_ulong *miss, *cmp;
int en;
if (excp == POWERPC_EXCP_IFTLB) {
@ -2478,7 +2478,7 @@ static always_inline void powerpc_excp (CPUState *env,
tlb_miss_74xx:
#if defined (DEBUG_SOFTWARE_TLB)
if (qemu_log_enabled()) {
const unsigned char *es;
const char *es;
target_ulong *miss, *cmp;
int en;
if (excp == POWERPC_EXCP_IFTLB) {

20
target-sparc/helper.c
View File

@ -583,15 +583,15 @@ void dump_mmu(CPUState *env)
break;
}
if ((env->dtlb_tte[i] & 0x8000000000000000ULL) != 0) {
printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx
printf("VA: %" PRIx64 ", PA: %" PRIx64
", %s, %s, %s, %s, ctx %" PRId64 "\n",
env->dtlb_tag[i] & ~0x1fffULL,
env->dtlb_tte[i] & 0x1ffffffe000ULL,
env->dtlb_tag[i] & (uint64_t)~0x1fffULL,
env->dtlb_tte[i] & (uint64_t)0x1ffffffe000ULL,
mask,
env->dtlb_tte[i] & 0x4? "priv": "user",
env->dtlb_tte[i] & 0x2? "RW": "RO",
env->dtlb_tte[i] & 0x40? "locked": "unlocked",
env->dtlb_tag[i] & 0x1fffULL);
env->dtlb_tag[i] & (uint64_t)0x1fffULL);
}
}
}
@ -616,14 +616,14 @@ void dump_mmu(CPUState *env)
break;
}
if ((env->itlb_tte[i] & 0x8000000000000000ULL) != 0) {
printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx
printf("VA: %" PRIx64 ", PA: %" PRIx64
", %s, %s, %s, ctx %" PRId64 "\n",
env->itlb_tag[i] & ~0x1fffULL,
env->itlb_tte[i] & 0x1ffffffe000ULL,
env->itlb_tag[i] & (uint64_t)~0x1fffULL,
env->itlb_tte[i] & (uint64_t)0x1ffffffe000ULL,
mask,
env->itlb_tte[i] & 0x4? "priv": "user",
env->itlb_tte[i] & 0x40? "locked": "unlocked",
env->itlb_tag[i] & 0x1fffULL);
env->itlb_tag[i] & (uint64_t)0x1fffULL);
}
}
}
@ -1314,7 +1314,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
}
cpu_def->fpu_version = fpu_version;
#ifdef DEBUG_FEATURES
fprintf(stderr, "fpu_version %llx\n", fpu_version);
fprintf(stderr, "fpu_version %x\n", fpu_version);
#endif
} else if (!strcmp(featurestr, "mmu_version")) {
char *err;
@ -1326,7 +1326,7 @@ static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model)
}
cpu_def->mmu_version = mmu_version;
#ifdef DEBUG_FEATURES
fprintf(stderr, "mmu_version %llx\n", mmu_version);
fprintf(stderr, "mmu_version %x\n", mmu_version);
#endif
} else if (!strcmp(featurestr, "nwindows")) {
char *err;

14
target-sparc/op_helper.c
View File

@ -1212,11 +1212,14 @@ GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1);
defined(DEBUG_MXCC)
static void dump_mxcc(CPUState *env)
{
printf("mxccdata: %016llx %016llx %016llx %016llx\n",
printf("mxccdata: %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64
"\n",
env->mxccdata[0], env->mxccdata[1],
env->mxccdata[2], env->mxccdata[3]);
printf("mxccregs: %016llx %016llx %016llx %016llx\n"
" %016llx %016llx %016llx %016llx\n",
printf("mxccregs: %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64
"\n"
" %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64
"\n",
env->mxccregs[0], env->mxccregs[1],
env->mxccregs[2], env->mxccregs[3],
env->mxccregs[4], env->mxccregs[5],
@ -1455,7 +1458,8 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
env->mmubpregs[reg] = 0ULL;
break;
}
DPRINTF_MMU("read breakpoint reg[%d] 0x%016llx\n", reg, ret);
DPRINTF_MMU("read breakpoint reg[%d] 0x%016" PRIx64 "\n", reg,
ret);
}
break;
case 8: /* User code access, XXX */
@ -1808,7 +1812,7 @@ void helper_st_asi(target_ulong addr, uint64_t val, int asi, int size)
env->mmubpregs[reg] = (val & 0xfULL);
break;
}
DPRINTF_MMU("write breakpoint reg[%d] 0x%016llx\n", reg,
DPRINTF_MMU("write breakpoint reg[%d] 0x%016x\n", reg,
env->mmuregs[reg]);
}
break;