target/e2k: remove unused code
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cebf683211
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0c803bff31
@ -135,7 +135,7 @@ TRANSW(sxtw, 1, 1, 1, 1, 1, 1, D,0,S,0, alf2, _, gen_sxtw);
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TRANSW(zxtb, 1, 1, 1, 1, 1, 1, D,0,S,0, alf2, _, gen_zxtb);
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TRANSW(zxth, 1, 1, 1, 1, 1, 1, D,0,S,0, alf2, _, gen_zxth);
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TRANSW(zxtw, 1, 1, 1, 1, 1, 1, D,0,S,0, alf2, _, gen_zxtw);
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TRANSD(sxt, 1, 1, 1, 1, 1, 1, D,S,S,0, alf1, gen_sxt);
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TRANSW(sxt, 1, 1, 1, 1, 1, 1, D,S,S,0, alf1, _, gen_helper_sxt);
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TRANSD(mergew, 1, 1, 1, 1, 1, 1, S,S,S,0, alf1, gen_merges);
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TRANSD(merged, 1, 1, 1, 1, 1, 1, D,D,D,0, alf1, gen_merged);
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TRANSW(addw, 1, 1, 1, 1, 1, 1, S,S,S,0, alf1, _, tcg_gen_add_i32);
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@ -1211,7 +1211,7 @@ static inline void decode_cs0(DisasContext *ctx, const UnpackedBundle *raw)
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if (ctx->cs1.type == CS1_ICALL) {
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break;
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}
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/* fallthrough */
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QEMU_FALLTHROUGH;
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case CS0_DONE:
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case CS0_HRET:
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case CS0_GLAUNCH:
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@ -2117,7 +2117,7 @@ static void gen_cond_i32(DisasContext *ctx, TCGv_i32 ret, uint8_t psrc)
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}
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}
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static inline void scan_needed(DisasContext *ctx, int need[7])
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static inline void scan_needed_lp(DisasContext *ctx, int need[7])
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{
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const UnpackedBundle *bundle = &ctx->bundle;
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bool once_more = true;
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@ -2182,7 +2182,7 @@ static void gen_plu(DisasContext *ctx)
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int i, need[7] = { 0 };
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TCGv_i32 *lp = ctx->lp;
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scan_needed(ctx, need);
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scan_needed_lp(ctx, need);
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for (i = 0; i < 7; i++) {
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if (need[i]) {
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@ -4400,19 +4400,6 @@ IMPL_GEN_ADDR(gen_addr_i32, s, tcg_gen_ext_i32_tl)
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IMPL_GEN_ADDR_SRC1(gen_addr_src1_i64, d, tcg_gen_trunc_i64_tl)
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IMPL_GEN_ADDR_SRC1(gen_addr_src1_i32, s, tcg_gen_ext_i32_tl)
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#define gen_ldb(i, a, b) gen_alf1_mas(i, a, gen_ld_raw_i64, MO_UB, b)
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#define gen_ldh(i, a, b) gen_alf1_mas(i, a, gen_ld_raw_i64, MO_UW, b)
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#define gen_ldw(i, a, b) gen_alf1_mas(i, a, gen_ld_raw_i64, MO_UL, b)
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#define gen_ldd(i, a, b) gen_alf1_mas(i, a, gen_ld_raw_i64, MO_UQ, b)
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#define gen_ldqp(i, a, b) gen_alf1_mas(i, a, gen_ld_raw_i128, MO_UO, b)
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#define gen_stb(i, a, b) gen_alf3_mas(i, a, gen_st_raw_i32, MO_UB, b)
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#define gen_sth(i, a, b) gen_alf3_mas(i, a, gen_st_raw_i32, MO_UW, b)
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#define gen_stw(i, a, b) gen_alf3_mas(i, a, gen_st_raw_i32, MO_UL, b)
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#define gen_std(i, a, b) gen_alf3_mas(i, a, gen_st_raw_i64, MO_UQ, b)
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#define gen_stqp(i, a, b) gen_alf3_mas(i, a, gen_st_raw_i128, MO_UO, b)
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#define gen_stmqp(i, a, b) gen_alf3_mas(i, a, gen_stm_raw_i128, MO_UO, b)
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static void gen_aaurwd_aad(Alop *alop, TCGv_i64 arg1, TCGv_i32 tag)
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{
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gen_helper_aaurwd_aad(tcg_env, tcg_constant_i32(alop->als.aad), arg1, tag);
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@ -5038,37 +5025,6 @@ static void gen_zxtw(TCGv_i64 ret, TCGv_i32 v)
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tcg_gen_extu_i32_i64(ret, v);
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}
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static void gen_sxt(Alop *alop)
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{
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tagged(s) s1 = gen_tagged_src1(s, alop);
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tagged(s) s2 = gen_tagged_src2(s, alop);
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tagged(d) r = tagged_temp_new(d);
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gen_tag2(d, r, s1, s2);
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if (IS_IMM5(alop->als.src1)) {
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uint8_t imm = GET_IMM5(alop->als.src1);
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if (imm & 4) {
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switch (imm & 3) {
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case 0: gen_zxtb(r.val, s2.val); break;
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case 1: gen_zxth(r.val, s2.val); break;
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default: gen_zxtw(r.val, s2.val); break;
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}
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} else {
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switch (imm & 3) {
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case 0: gen_sxtb(r.val, s2.val); break;
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case 1: gen_sxth(r.val, s2.val); break;
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default: gen_sxtw(r.val, s2.val); break;
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}
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}
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} else {
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gen_helper_sxt(r.val, s1.val, s2.val);
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}
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gen_al_result(d, alop, r);
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}
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#define IMPL_GEN_HELPER_GETF(S) \
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static void glue(gen_helper_getf, S)(DisasContext *ctx, \
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temp(S) ret, temp(S) src1, temp(S) src2) \
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@ -5294,22 +5250,6 @@ typedef enum {
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IMPL_GEN_ICOMB_OP(i64)
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IMPL_GEN_ICOMB_OP(i32)
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static inline bool icomb_check(DisasContext *ctx, Alop *alop,
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IComb opc1, IComb opc2)
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{
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if (!is_chan_14(alop->chan)) {
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return false;
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}
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if (ctx->version == 1) {
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return opc1 != ICOMB_RSUB;
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} else {
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return opc1 != ICOMB_RSUB
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&& opc2 < ICOMB_SCL
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&& opc2 != ICOMB_MERGE;
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}
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}
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typedef enum {
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FCOMB_ADD = 0,
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FCOMB_SUB = 1,
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@ -6079,7 +6019,7 @@ static inline void gen_cs1(DisasContext *ctx)
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break;
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case CS1_CALL:
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ctx->ct.type = CT_CALL;
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/* fallthrough */
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QEMU_FALLTHROUGH;
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case CS1_ICALL:
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if (ctx->w_size < cs1->call_wbs * 2) {
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gen_tr_excp_window_bounds(ctx);
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