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target-xtensa: handle cache options in the overlay tool

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Cache options must be enabled for the cores that have cache to avoid
illegal instruction exceptions.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2011-10-24 04:22:47 +04:00
parent 53a72dfda5
commit 0c852e171b
1 changed files with 6 additions and 0 deletions
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6
target-xtensa/overlay_tool.h
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@ -71,6 +71,12 @@
XTENSA_OPTION_HIGH_PRIORITY_INTERRUPT) | \
XCHAL_OPTION(XCHAL_HAVE_CCOUNT, XTENSA_OPTION_TIMER_INTERRUPT) | \
/* Local memory, TODO */ \
XCHAL_OPTION(XCHAL_ICACHE_WAYS, XTENSA_OPTION_ICACHE) | \
XCHAL_OPTION(XCHAL_ICACHE_LINE_LOCKABLE, \
XTENSA_OPTION_ICACHE_INDEX_LOCK) | \
XCHAL_OPTION(XCHAL_DCACHE_WAYS, XTENSA_OPTION_DCACHE) | \
XCHAL_OPTION(XCHAL_DCACHE_LINE_LOCKABLE, \
XTENSA_OPTION_DCACHE_INDEX_LOCK) | \
XCHAL_OPTION(XCHAL_UNALIGNED_LOAD_HW, XTENSA_OPTION_HW_ALIGNMENT) | \
/* Memory protection and translation */ \
XCHAL_OPTION(XCHAL_HAVE_MIMIC_CACHEATTR, \