linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
This is the prctl bit that controls whether syscalls accept tagged addresses. See Documentation/arm64/tagged-address-abi.rst in the linux kernel. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210212184902.1251044-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -30,4 +30,8 @@ struct target_pt_regs {
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# define TARGET_PR_PAC_APDBKEY (1 << 3)
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# define TARGET_PR_PAC_APDBKEY (1 << 3)
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# define TARGET_PR_PAC_APGAKEY (1 << 4)
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# define TARGET_PR_PAC_APGAKEY (1 << 4)
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#define TARGET_PR_SET_TAGGED_ADDR_CTRL 55
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#define TARGET_PR_GET_TAGGED_ADDR_CTRL 56
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# define TARGET_PR_TAGGED_ADDR_ENABLE (1UL << 0)
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#endif /* AARCH64_TARGET_SYSCALL_H */
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#endif /* AARCH64_TARGET_SYSCALL_H */
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@ -10993,6 +10993,30 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
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}
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}
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}
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}
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return -TARGET_EINVAL;
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return -TARGET_EINVAL;
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case TARGET_PR_SET_TAGGED_ADDR_CTRL:
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{
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abi_ulong valid_mask = TARGET_PR_TAGGED_ADDR_ENABLE;
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CPUARMState *env = cpu_env;
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if ((arg2 & ~valid_mask) || arg3 || arg4 || arg5) {
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return -TARGET_EINVAL;
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}
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env->tagged_addr_enable = arg2 & TARGET_PR_TAGGED_ADDR_ENABLE;
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return 0;
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}
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case TARGET_PR_GET_TAGGED_ADDR_CTRL:
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{
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abi_long ret = 0;
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CPUARMState *env = cpu_env;
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if (arg2 || arg3 || arg4 || arg5) {
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return -TARGET_EINVAL;
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}
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if (env->tagged_addr_enable) {
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ret |= TARGET_PR_TAGGED_ADDR_ENABLE;
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}
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return ret;
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}
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#endif /* AARCH64 */
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#endif /* AARCH64 */
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case PR_GET_SECCOMP:
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case PR_GET_SECCOMP:
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case PR_SET_SECCOMP:
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case PR_SET_SECCOMP:
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@ -20,6 +20,9 @@
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#ifdef CONFIG_USER_ONLY
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#ifdef CONFIG_USER_ONLY
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#define TARGET_PAGE_BITS 12
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#define TARGET_PAGE_BITS 12
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# ifdef TARGET_AARCH64
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# define TARGET_TAGGED_ADDRESSES
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# endif
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#else
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#else
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/*
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/*
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* ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
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* ARMv7 and later CPUs have 4K pages minimum, but ARMv5 and v6
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@ -721,6 +721,11 @@ typedef struct CPUARMState {
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const struct arm_boot_info *boot_info;
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const struct arm_boot_info *boot_info;
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/* Store GICv3CPUState to access from this struct */
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/* Store GICv3CPUState to access from this struct */
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void *gicv3state;
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void *gicv3state;
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#ifdef TARGET_TAGGED_ADDRESSES
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/* Linux syscall tagged address support */
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bool tagged_addr_enable;
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#endif
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} CPUARMState;
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} CPUARMState;
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static inline void set_feature(CPUARMState *env, int feature)
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static inline void set_feature(CPUARMState *env, int feature)
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@ -3604,6 +3609,32 @@ static inline MemTxAttrs *typecheck_memtxattrs(MemTxAttrs *x)
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*/
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*/
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#define PAGE_BTI PAGE_TARGET_1
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#define PAGE_BTI PAGE_TARGET_1
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#ifdef TARGET_TAGGED_ADDRESSES
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/**
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* cpu_untagged_addr:
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* @cs: CPU context
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* @x: tagged address
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*
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* Remove any address tag from @x. This is explicitly related to the
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* linux syscall TIF_TAGGED_ADDR setting, not TBI in general.
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*
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* There should be a better place to put this, but we need this in
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* include/exec/cpu_ldst.h, and not some place linux-user specific.
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*/
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static inline target_ulong cpu_untagged_addr(CPUState *cs, target_ulong x)
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{
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ARMCPU *cpu = ARM_CPU(cs);
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if (cpu->env.tagged_addr_enable) {
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/*
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* TBI is enabled for userspace but not kernelspace addresses.
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* Only clear the tag if bit 55 is clear.
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*/
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x &= sextract64(x, 0, 56);
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}
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return x;
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}
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#endif
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/*
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/*
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* Naming convention for isar_feature functions:
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* Naming convention for isar_feature functions:
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* Functions which test 32-bit ID registers should have _aa32_ in
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* Functions which test 32-bit ID registers should have _aa32_ in
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