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cpu-exec: Change cpu_resume_from_signal() argument to CPUState

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Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2013-09-03 02:12:23 +02:00
parent b3310ab338
commit 0ea8cb8895
9 changed files with 11 additions and 14 deletions
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4
cpu-exec.c
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@ -33,10 +33,8 @@ void cpu_loop_exit(CPUState *cpu)
restored in a state compatible with the CPU emulator
*/
#if defined(CONFIG_SOFTMMU)
void cpu_resume_from_signal(CPUArchState *env, void *puc)
void cpu_resume_from_signal(CPUState *cpu, void *puc)
{
CPUState *cpu = ENV_GET_CPU(env);
/* XXX: restore cpu registers saved in host registers */
cpu->exception_index = -1;

2
exec.c
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@ -1608,7 +1608,7 @@ static void check_watchpoint(int offset, int len_mask, int flags)
} else {
cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
tb_gen_code(cpu, pc, cs_base, cpu_flags, 1);
cpu_resume_from_signal(env, NULL);
cpu_resume_from_signal(cpu, NULL);
}
}
} else {

2
hw/i386/kvmvapic.c
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@ -449,7 +449,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
if (!kvm_enabled()) {
cs->current_tb = NULL;
tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1);
cpu_resume_from_signal(env, NULL);
cpu_resume_from_signal(cs, NULL);
}
}

2
include/exec/exec-all.h
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@ -83,7 +83,7 @@ int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb,
bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void page_size_init(void);
void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc);
void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
TranslationBlock *tb_gen_code(CPUState *cpu,
target_ulong pc, target_ulong cs_base, int flags,

2
target-i386/helper.c
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@ -1102,7 +1102,7 @@ void breakpoint_handler(CPUX86State *env)
if (check_hw_breakpoints(env, false)) {
raise_exception(env, EXCP01_DB);
} else {
cpu_resume_from_signal(env, NULL);
cpu_resume_from_signal(cs, NULL);
}
}
} else {

2
target-lm32/helper.c
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@ -135,7 +135,7 @@ void lm32_debug_excp_handler(CPULM32State *env)
if (check_watchpoints(env)) {
raise_exception(env, EXCP_WATCHPOINT);
} else {
cpu_resume_from_signal(env, NULL);
cpu_resume_from_signal(cs, NULL);
}
}
} else {

2
target-xtensa/helper.c
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@ -92,7 +92,7 @@ void xtensa_breakpoint_handler(CPUXtensaState *env)
if (cause) {
debug_exception_env(env, cause);
}
cpu_resume_from_signal(env, NULL);
cpu_resume_from_signal(cs, NULL);
}
}
}

6
translate-all.c
View File

@ -1113,7 +1113,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
itself */
cpu->current_tb = NULL;
tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1);
cpu_resume_from_signal(env, NULL);
cpu_resume_from_signal(cpu, NULL);
}
#endif
}
@ -1213,7 +1213,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
if (locked) {
mmap_unlock();
}
cpu_resume_from_signal(env, puc);
cpu_resume_from_signal(cpu, puc);
}
#endif
}
@ -1476,7 +1476,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
repeating the fault, which is horribly inefficient.
Better would be to execute just this insn uncached, or generate a
second new TB. */
cpu_resume_from_signal(env, NULL);
cpu_resume_from_signal(cpu, NULL);
}
void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)

3
user-exec.c
View File

@ -52,9 +52,8 @@ static void exception_action(CPUArchState *env1)
/* exit the current TB from a signal handler. The host registers are
restored in a state compatible with the CPU emulator
*/
void cpu_resume_from_signal(CPUArchState *env1, void *puc)
void cpu_resume_from_signal(CPUState *cpu, void *puc)
{
CPUState *cpu = ENV_GET_CPU(env1);
#ifdef __linux__
struct ucontext *uc = puc;
#elif defined(__OpenBSD__)