From 0f7b791b35f24cb1333f779705a3f6472e6935de Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Tue, 6 Nov 2018 11:32:14 +0000 Subject: [PATCH] target/arm: Set S and PTW in 64-bit PAR format MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In do_ats_write() we construct a PAR value based on the result of the translation. A comment says "S2WLK and FSTAGE are always zero, because we don't implement virtualization". Since we do in fact now implement virtualization, add the missing code that sets these bits based on the reported ARMMMUFaultInfo. (These bits are named PTW and S in ARMv8, so we follow that convention in the new comments in this patch.) Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Alex Bennée Message-id: 20181016093703.10637-2-peter.maydell@linaro.org --- target/arm/helper.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 0ea95b0815..69f684abd8 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -2347,10 +2347,12 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value, par64 |= 1; /* F */ par64 |= (fsr & 0x3f) << 1; /* FS */ - /* Note that S2WLK and FSTAGE are always zero, because we don't - * implement virtualization and therefore there can't be a stage 2 - * fault. - */ + if (fi.stage2) { + par64 |= (1 << 9); /* S */ + } + if (fi.s1ptw) { + par64 |= (1 << 8); /* PTW */ + } } } else { /* fsr is a DFSR/IFSR value for the short descriptor