more correct e820 ranges for ACPI compatibility
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1901 c046a42c-6fe2-441c-8c8c-71466251a162
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pc-bios/bios.bin
BIN
pc-bios/bios.bin
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@ -4,7 +4,7 @@ RCS file: /cvsroot/bochs/bochs/bios/apmbios.S,v
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retrieving revision 1.4
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diff -u -w -r1.4 apmbios.S
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--- apmbios.S 26 Dec 2005 10:35:51 -0000 1.4
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+++ apmbios.S 28 Apr 2006 22:41:19 -0000
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+++ apmbios.S 3 May 2006 21:22:46 -0000
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@@ -225,6 +225,7 @@
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APMSYM(05):
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cmp al, #0x05
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@ -19,7 +19,7 @@ RCS file: /cvsroot/bochs/bochs/bios/rombios.c,v
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retrieving revision 1.160
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diff -u -w -r1.160 rombios.c
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--- rombios.c 25 Jan 2006 17:51:49 -0000 1.160
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+++ rombios.c 28 Apr 2006 22:41:21 -0000
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+++ rombios.c 3 May 2006 21:22:48 -0000
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@@ -1816,6 +1816,7 @@
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{
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printf(BX_APPNAME" BIOS - build: %s\n%s\nOptions: ",
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@ -38,7 +38,137 @@ diff -u -w -r1.160 rombios.c
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}
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//--------------------------------------------------------------------------
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@@ -8713,6 +8717,7 @@
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@@ -3999,6 +4003,29 @@
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}
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#endif
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+
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+void set_e820_range(ES, DI, start, end, type)
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+ Bit16u ES;
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+ Bit16u DI;
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+ Bit32u start;
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+ Bit32u end;
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+ Bit16u type;
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+{
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+ write_word(ES, DI, start);
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+ write_word(ES, DI+2, start >> 16);
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+ write_word(ES, DI+4, 0x00);
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+ write_word(ES, DI+6, 0x00);
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+
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+ end -= start;
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+ write_word(ES, DI+8, end);
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+ write_word(ES, DI+10, end >> 16);
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+ write_word(ES, DI+12, 0x0000);
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+ write_word(ES, DI+14, 0x0000);
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+
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+ write_word(ES, DI+16, type);
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+ write_word(ES, DI+18, 0x0);
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+}
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+
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void
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int15_function32(regs, ES, DS, FLAGS)
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pushad_regs_t regs; // REGS pushed via pushad
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@@ -4063,19 +4090,8 @@
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switch(regs.u.r16.bx)
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{
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case 0:
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- write_word(ES, regs.u.r16.di, 0x00);
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- write_word(ES, regs.u.r16.di+2, 0x00);
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- write_word(ES, regs.u.r16.di+4, 0x00);
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- write_word(ES, regs.u.r16.di+6, 0x00);
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-
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- write_word(ES, regs.u.r16.di+8, 0xFC00);
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- write_word(ES, regs.u.r16.di+10, 0x0009);
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- write_word(ES, regs.u.r16.di+12, 0x0000);
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- write_word(ES, regs.u.r16.di+14, 0x0000);
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-
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- write_word(ES, regs.u.r16.di+16, 0x1);
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- write_word(ES, regs.u.r16.di+18, 0x0);
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-
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+ set_e820_range(ES, regs.u.r16.di,
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+ 0x0000000L, 0x0009fc00L, 1);
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regs.u.r32.ebx = 1;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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@@ -4083,6 +4099,24 @@
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return;
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break;
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case 1:
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+ set_e820_range(ES, regs.u.r16.di,
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+ 0x0009fc00L, 0x000a0000L, 2);
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+ regs.u.r32.ebx = 2;
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+ regs.u.r32.eax = 0x534D4150;
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+ regs.u.r32.ecx = 0x14;
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+ CLEAR_CF();
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+ return;
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+ break;
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+ case 2:
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+ set_e820_range(ES, regs.u.r16.di,
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+ 0x000e8000L, 0x00100000L, 2);
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+ regs.u.r32.ebx = 3;
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+ regs.u.r32.eax = 0x534D4150;
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+ regs.u.r32.ecx = 0x14;
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+ CLEAR_CF();
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+ return;
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+ break;
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+ case 3:
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extended_memory_size = inb_cmos(0x35);
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extended_memory_size <<= 8;
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extended_memory_size |= inb_cmos(0x34);
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@@ -4092,9 +4126,9 @@
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extended_memory_size = 0x3bc000; // everything after this is reserved memory until we get to 0x100000000
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}
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extended_memory_size *= 1024;
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- extended_memory_size += 15728640; // make up for the 16mb of memory that is chopped off
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+ extended_memory_size += (16L * 1024 * 1024);
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- if(extended_memory_size <= 15728640)
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+ if(extended_memory_size <= (16L * 1024 * 1024))
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{
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extended_memory_size = inb_cmos(0x31);
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extended_memory_size <<= 8;
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@@ -4102,28 +4136,23 @@
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extended_memory_size *= 1024;
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}
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- write_word(ES, regs.u.r16.di, 0x0000);
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- write_word(ES, regs.u.r16.di+2, 0x0010);
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- write_word(ES, regs.u.r16.di+4, 0x0000);
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- write_word(ES, regs.u.r16.di+6, 0x0000);
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-
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- write_word(ES, regs.u.r16.di+8, extended_memory_size);
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- extended_memory_size >>= 16;
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- write_word(ES, regs.u.r16.di+10, extended_memory_size);
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- extended_memory_size >>= 16;
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- write_word(ES, regs.u.r16.di+12, extended_memory_size);
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- extended_memory_size >>= 16;
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- write_word(ES, regs.u.r16.di+14, extended_memory_size);
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-
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- write_word(ES, regs.u.r16.di+16, 0x1);
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- write_word(ES, regs.u.r16.di+18, 0x0);
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-
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- regs.u.r32.ebx = 0;
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+ set_e820_range(ES, regs.u.r16.di,
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+ 0x00100000L, extended_memory_size, 1);
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+ regs.u.r32.ebx = 4;
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regs.u.r32.eax = 0x534D4150;
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regs.u.r32.ecx = 0x14;
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CLEAR_CF();
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return;
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break;
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+ case 4:
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+ /* 256KB BIOS area at the end of 4 GB */
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+ set_e820_range(ES, regs.u.r16.di,
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+ 0xfffc0000L, 0x00000000L, 2);
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+ regs.u.r32.ebx = 0;
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+ regs.u.r32.eax = 0x534D4150;
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+ regs.u.r32.ecx = 0x14;
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+ CLEAR_CF();
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+ return;
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default: /* AX=E820, DX=534D4150, BX unrecognized */
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goto int15_unimplemented;
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break;
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@@ -8713,6 +8742,7 @@
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mov al, #0x80
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bios32_end:
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popf
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@ -46,7 +176,7 @@ diff -u -w -r1.160 rombios.c
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retf
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.align 16
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@@ -8823,17 +8828,17 @@
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@@ -8823,17 +8853,17 @@
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pci_pro_fail:
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pop edi
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pop esi
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@ -66,7 +196,7 @@ diff -u -w -r1.160 rombios.c
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retf
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pci_pro_select_reg:
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@@ -8971,7 +8976,7 @@
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@@ -8971,7 +9001,7 @@
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jmp pci_real_ok
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pci_real_f0d: ;; write configuration dword
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cmp al, #0x0d
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@ -75,7 +205,7 @@ diff -u -w -r1.160 rombios.c
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call pci_real_select_reg
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push dx
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mov dx, #0x0cfc
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@@ -8979,6 +8984,46 @@
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@@ -8979,6 +9009,46 @@
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out dx, eax
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pop dx
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jmp pci_real_ok
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@ -122,7 +252,7 @@ diff -u -w -r1.160 rombios.c
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pci_real_unknown:
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mov ah, #0x81
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pci_real_fail:
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@@ -9019,6 +9064,7 @@
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@@ -9019,6 +9089,7 @@
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dw 0,0 ;; Miniport data
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db 0,0,0,0,0,0,0,0,0,0,0 ;; reserved
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db 0x07 ;; checksum
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@ -130,7 +260,7 @@ diff -u -w -r1.160 rombios.c
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;; first slot entry PCI-to-ISA (embedded)
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db 0 ;; pci bus number
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db 0x08 ;; pci device number (bit 7-3)
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@@ -9097,6 +9143,7 @@
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@@ -9097,6 +9168,7 @@
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dw 0xdef8 ;; IRQ bitmap INTD#
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db 5 ;; physical slot (0 = embedded)
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db 0 ;; reserved
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