target-i386: Rearrange processing of 0F AE
Rather than nesting tests of OP, MOD, and RM, decode them all at once with a switch. Also, add some missing #UD checks for e.g. incorrect LOCK prefix. Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -7527,13 +7527,12 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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break;
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case 0x1ae:
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modrm = cpu_ldub_code(env, s->pc++);
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mod = (modrm >> 6) & 3;
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op = (modrm >> 3) & 7;
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switch(op) {
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case 0: /* fxsave */
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if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) ||
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(s->prefix & PREFIX_LOCK))
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switch (modrm) {
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CASE_MEM_OP(0): /* fxsave */
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if (!(s->cpuid_features & CPUID_FXSR)
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|| (prefixes & PREFIX_LOCK)) {
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goto illegal_op;
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}
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if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
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gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
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break;
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@ -7541,10 +7540,12 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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gen_lea_modrm(env, s, modrm);
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gen_helper_fxsave(cpu_env, cpu_A0);
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break;
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case 1: /* fxrstor */
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if (mod == 3 || !(s->cpuid_features & CPUID_FXSR) ||
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(s->prefix & PREFIX_LOCK))
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CASE_MEM_OP(1): /* fxrstor */
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if (!(s->cpuid_features & CPUID_FXSR)
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|| (prefixes & PREFIX_LOCK)) {
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goto illegal_op;
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}
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if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
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gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
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break;
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@ -7552,71 +7553,90 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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gen_lea_modrm(env, s, modrm);
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gen_helper_fxrstor(cpu_env, cpu_A0);
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break;
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case 2: /* ldmxcsr */
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case 3: /* stmxcsr */
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CASE_MEM_OP(2): /* ldmxcsr */
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if ((s->flags & HF_EM_MASK) || !(s->flags & HF_OSFXSR_MASK)) {
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goto illegal_op;
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}
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if (s->flags & HF_TS_MASK) {
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gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
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break;
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}
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if ((s->flags & HF_EM_MASK) || !(s->flags & HF_OSFXSR_MASK) ||
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mod == 3)
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goto illegal_op;
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gen_lea_modrm(env, s, modrm);
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if (op == 2) {
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tcg_gen_qemu_ld_i32(cpu_tmp2_i32, cpu_A0,
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s->mem_index, MO_LEUL);
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tcg_gen_qemu_ld_i32(cpu_tmp2_i32, cpu_A0, s->mem_index, MO_LEUL);
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gen_helper_ldmxcsr(cpu_env, cpu_tmp2_i32);
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} else {
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tcg_gen_ld32u_tl(cpu_T0,
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cpu_env, offsetof(CPUX86State, mxcsr));
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break;
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CASE_MEM_OP(3): /* stmxcsr */
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if ((s->flags & HF_EM_MASK) || !(s->flags & HF_OSFXSR_MASK)) {
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goto illegal_op;
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}
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if (s->flags & HF_TS_MASK) {
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gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
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break;
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}
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gen_lea_modrm(env, s, modrm);
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tcg_gen_ld32u_tl(cpu_T0, cpu_env, offsetof(CPUX86State, mxcsr));
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gen_op_st_v(s, MO_32, cpu_T0, cpu_A0);
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}
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break;
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case 5: /* lfence */
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if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2))
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CASE_MEM_OP(6): /* clwb */
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if (prefixes & PREFIX_LOCK) {
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goto illegal_op;
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break;
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case 6: /* mfence/clwb */
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if (s->prefix & PREFIX_DATA) {
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}
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if (prefixes & PREFIX_DATA) {
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/* clwb */
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if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLWB))
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if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLWB)) {
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goto illegal_op;
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}
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gen_nop_modrm(env, s, modrm);
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} else {
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/* mfence */
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if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2))
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goto illegal_op;
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}
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break;
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case 7: /* sfence / clflush / clflushopt / pcommit */
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if ((modrm & 0xc7) == 0xc0) {
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if (s->prefix & PREFIX_DATA) {
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/* pcommit */
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if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_PCOMMIT))
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}
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goto illegal_op;
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} else {
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/* sfence */
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/* XXX: also check for cpuid_ext2_features & CPUID_EXT2_EMMX */
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if (!(s->cpuid_features & CPUID_SSE))
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CASE_MEM_OP(7): /* clflush / clflushopt */
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if (prefixes & PREFIX_LOCK) {
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goto illegal_op;
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}
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} else {
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if (s->prefix & PREFIX_DATA) {
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if (prefixes & PREFIX_DATA) {
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/* clflushopt */
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if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLFLUSHOPT))
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if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLFLUSHOPT)) {
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goto illegal_op;
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}
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} else {
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/* clflush */
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if (!(s->cpuid_features & CPUID_CLFLUSH))
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if ((s->prefix & (PREFIX_REPZ | PREFIX_REPNZ))
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|| !(s->cpuid_features & CPUID_CLFLUSH)) {
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goto illegal_op;
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}
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gen_lea_modrm(env, s, modrm);
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}
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gen_nop_modrm(env, s, modrm);
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break;
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case 0xf8: /* sfence / pcommit */
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if (prefixes & PREFIX_DATA) {
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/* pcommit */
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if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_PCOMMIT)
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|| (prefixes & PREFIX_LOCK)) {
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goto illegal_op;
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}
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break;
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}
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/* fallthru */
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case 0xf9 ... 0xff: /* sfence */
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case 0xe8 ... 0xef: /* lfence */
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case 0xf0 ... 0xf7: /* mfence */
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if (!(s->cpuid_features & CPUID_SSE2)
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|| (prefixes & PREFIX_LOCK)) {
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goto illegal_op;
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}
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break;
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default:
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goto illegal_op;
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}
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break;
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case 0x10d: /* 3DNow! prefetch(w) */
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modrm = cpu_ldub_code(env, s->pc++);
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mod = (modrm >> 6) & 3;
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