tcg/aarch64: Remove unused code in tcg_out_op
AArch64 defines the TCG_TARGET_HAS_direct_jump. So the "else" block is useless in the case of "INDEX_op_goto_tb" in function "tcg_out_op". Add an assertion and delete these codes for clarity. Suggested-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Qi Hu <huqi@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221017020826.990729-1-huqi@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -1916,24 +1916,21 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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break;
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break;
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case INDEX_op_goto_tb:
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case INDEX_op_goto_tb:
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if (s->tb_jmp_insn_offset != NULL) {
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tcg_debug_assert(s->tb_jmp_insn_offset != NULL);
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/* TCG_TARGET_HAS_direct_jump */
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/*
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/* Ensure that ADRP+ADD are 8-byte aligned so that an atomic
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* Ensure that ADRP+ADD are 8-byte aligned so that an atomic
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write can be used to patch the target address. */
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* write can be used to patch the target address.
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if ((uintptr_t)s->code_ptr & 7) {
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*/
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tcg_out32(s, NOP);
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if ((uintptr_t)s->code_ptr & 7) {
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}
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tcg_out32(s, NOP);
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s->tb_jmp_insn_offset[a0] = tcg_current_code_size(s);
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/* actual branch destination will be patched by
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tb_target_set_jmp_target later. */
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tcg_out_insn(s, 3406, ADRP, TCG_REG_TMP, 0);
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tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64, TCG_REG_TMP, TCG_REG_TMP, 0);
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} else {
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/* !TCG_TARGET_HAS_direct_jump */
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tcg_debug_assert(s->tb_jmp_target_addr != NULL);
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intptr_t offset = tcg_pcrel_diff(s, (s->tb_jmp_target_addr + a0)) >> 2;
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tcg_out_insn(s, 3305, LDR, offset, TCG_REG_TMP);
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}
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}
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s->tb_jmp_insn_offset[a0] = tcg_current_code_size(s);
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/*
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* actual branch destination will be patched by
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* tb_target_set_jmp_target later
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*/
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tcg_out_insn(s, 3406, ADRP, TCG_REG_TMP, 0);
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tcg_out_insn(s, 3401, ADDI, TCG_TYPE_I64, TCG_REG_TMP, TCG_REG_TMP, 0);
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tcg_out_insn(s, 3207, BR, TCG_REG_TMP);
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tcg_out_insn(s, 3207, BR, TCG_REG_TMP);
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set_jmp_reset_offset(s, a0);
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set_jmp_reset_offset(s, a0);
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break;
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break;
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