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Spelling fixes, by Stefan Weil. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4655 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-06-03 19:51:57 +00:00
parent c8a706fe62
commit 1235fc066a
13 changed files with 17 additions and 17 deletions
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2
exec-all.h
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@ -216,7 +216,7 @@ static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr
{
/* patch the branch destination */
*(uint32_t *)jmp_addr = addr - (jmp_addr + 4);
/* no need to flush icache explicitely */
/* no need to flush icache explicitly */
}
#elif defined(__arm__)
static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)

2
hw/alpha_palcode.c
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@ -55,7 +55,7 @@ pal_handler_t pal_handlers[] = {
};
#if 0
/* One must explicitely check that the TB is valid and the FOE bit is reset */
/* One must explicitly check that the TB is valid and the FOE bit is reset */
static void update_itb (void)
{
/* This writes into a temp register, not the actual one */

2
hw/integratorcp.c
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@ -494,7 +494,7 @@ static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size,
}
ram_offset = qemu_ram_alloc(ram_size);
/* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */
/* ??? RAM shoud repeat to fill physical memory space. */
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero*/
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
/* And again at address 0x80000000 */

2
hw/realview.c
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@ -64,7 +64,7 @@ static void realview_init(ram_addr_t ram_size, int vga_ram_size,
}
}
/* ??? RAM shoud repeat to fill physical memory space. */
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);

2
hw/scsi-disk.c
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@ -662,7 +662,7 @@ static int32_t scsi_send_command(SCSIDevice *d, uint32_t tag,
case 0x46:
DPRINTF("Get Configuration (rt %d, maxlen %d)\n", buf[1] & 3, len);
memset(outbuf, 0, 8);
/* ??? This shoud probably return much more information. For now
/* ??? This should probably return much more information. For now
just return the basic header indicating the CD-ROM profile. */
outbuf[7] = 8; // CD-ROM
r->buf_len = 8;

2
hw/versatilepb.c
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@ -182,7 +182,7 @@ static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
fprintf(stderr, "Unable to find CPU definition\n");
exit(1);
}
/* ??? RAM shoud repeat to fill physical memory space. */
/* ??? RAM should repeat to fill physical memory space. */
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);

2
linux-user/path.c
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@ -82,7 +82,7 @@ static struct pathelem *add_entry(struct pathelem *root, const char *name)
return root;
}
/* This needs to be done after tree is stabalized (ie. no more reallocs!). */
/* This needs to be done after tree is stabilized (ie. no more reallocs!). */
static void set_parents(struct pathelem *child, struct pathelem *parent)
{
unsigned int i;

2
linux-user/qemu.h
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@ -388,7 +388,7 @@ static inline void *lock_user(int type, abi_ulong guest_addr, long len, int copy
}
/* Unlock an area of guest memory. The first LEN bytes must be
flushed back to guest memory. host_ptr = NULL is explicitely
flushed back to guest memory. host_ptr = NULL is explicitly
allowed and does nothing. */
static inline void unlock_user(void *host_ptr, abi_ulong guest_addr,
long len)

4
qemu-tech.texi
View File

@ -277,7 +277,7 @@ The new Plex86 [8] PC virtualizer is done in the same spirit as the
qemu-fast system emulator. It requires a patched Linux kernel to work
(you cannot launch the same kernel on your PC), but the patches are
really small. As it is a PC virtualizer (no emulation is done except
for some priveledged instructions), it has the potential of being
for some privileged instructions), it has the potential of being
faster than QEMU. The downside is that a complicated (and potentially
unsafe) host kernel patch is needed.
@ -334,7 +334,7 @@ instruction, it just stores one operand (called @code{CC_SRC}), the
result (called @code{CC_DST}) and the type of operation (called
@code{CC_OP}).
@code{CC_OP} is almost never explicitely set in the generated code
@code{CC_OP} is almost never explicitly set in the generated code
because it is known at translation time.
In order to increase performances, a backward pass is performed on the

2
target-i386/cpu.h
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@ -351,7 +351,7 @@
enum {
CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
CC_OP_EFLAGS, /* all cc are explicitely computed, CC_SRC = flags */
CC_OP_EFLAGS, /* all cc are explicitly computed, CC_SRC = flags */
CC_OP_MULB, /* modify all flags, C, O = (CC_SRC != 0) */
CC_OP_MULW,

8
target-i386/op_helper.c
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@ -689,7 +689,7 @@ static void do_interrupt_protected(int intno, int is_int, int error_code,
}
dpl = (e2 >> DESC_DPL_SHIFT) & 3;
cpl = env->hflags & HF_CPL_MASK;
/* check privledge if software int */
/* check privilege if software int */
if (is_int && dpl < cpl)
raise_exception_err(EXCP0D_GPF, intno * 8 + 2);
/* check valid bit */
@ -900,7 +900,7 @@ static void do_interrupt64(int intno, int is_int, int error_code,
}
dpl = (e2 >> DESC_DPL_SHIFT) & 3;
cpl = env->hflags & HF_CPL_MASK;
/* check privledge if software int */
/* check privilege if software int */
if (is_int && dpl < cpl)
raise_exception_err(EXCP0D_GPF, intno * 16 + 2);
/* check valid bit */
@ -1166,7 +1166,7 @@ void do_interrupt_user(int intno, int is_int, int error_code,
dpl = (e2 >> DESC_DPL_SHIFT) & 3;
cpl = env->hflags & HF_CPL_MASK;
/* check privledge if software int */
/* check privilege if software int */
if (is_int && dpl < cpl)
raise_exception_err(EXCP0D_GPF, (intno << shift) + 2);
@ -2698,7 +2698,7 @@ static inline void helper_ret_protected(int shift, int is_iret, int addend)
sp += addend;
if (rpl == cpl && (!(env->hflags & HF_CS64_MASK) ||
((env->hflags & HF_CS64_MASK) && !is_iret))) {
/* return to same priledge level */
/* return to same privilege level */
cpu_x86_load_seg_cache(env, R_CS, new_cs,
get_seg_base(e1, e2),
get_seg_limit(e1, e2),

2
target-ppc/translate.c
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@ -287,7 +287,7 @@ static void gen_##name (DisasContext *ctx)
typedef struct opcode_t {
unsigned char opc1, opc2, opc3;
#if HOST_LONG_BITS == 64 /* Explicitely align to 64 bits */
#if HOST_LONG_BITS == 64 /* Explicitly align to 64 bits */
unsigned char pad[5];
#else
unsigned char pad[1];

2
tcg/tcg.c
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@ -1406,7 +1406,7 @@ static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args)
propagation */
tcg_out_movi(s, ots->type, ots->reg, val);
} else {
/* The movi is not explicitely generated here */
/* The movi is not explicitly generated here */
if (ots->val_type == TEMP_VAL_REG)
s->reg_to_temp[ots->reg] = -1;
ots->val_type = TEMP_VAL_CONST;