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hw/sparc: Allow building without the leon3 machine

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When building without the leon3 machine, we get this link failure:

  /usr/bin/ld: target_sparc_int32_helper.c.o: in function `leon3_irq_manager':
  target/sparc/int32_helper.c:172: undefined reference to `leon3_irq_ack'

This is because the leon3_irq_ack() is declared in hw/sparc/leon3.c,
which is only build when CONFIG_LEON3 is selected.

Fix by moving the leon3_cache_control_int() / leon3_irq_manager()
(which are specific to the leon3 machine) to hw/sparc/leon3.c.
Move the trace events along (but don't rename them).

leon3_irq_ack() is now locally used, declare it static to reduce
its scope.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Tested-by: KONRAD Frederic <frederic.konrad@adacore.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20210428141655.387430-2-f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This commit is contained in:
Philippe Mathieu-Daudé 2021-04-28 16:16:51 +02:00 committed by Mark Cave-Ayland
parent bcdd781ff8
commit 1284119991
5 changed files with 38 additions and 48 deletions
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37
hw/sparc/leon3.c
View File

@ -137,7 +137,36 @@ static void main_cpu_reset(void *opaque)
env->regbase[6] = s->sp;
}
void leon3_irq_ack(void *irq_manager, int intno)
static void leon3_cache_control_int(CPUSPARCState *env)
{
uint32_t state = 0;
if (env->cache_control & CACHE_CTRL_IF) {
/* Instruction cache state */
state = env->cache_control & CACHE_STATE_MASK;
if (state == CACHE_ENABLED) {
state = CACHE_FROZEN;
trace_int_helper_icache_freeze();
}
env->cache_control &= ~CACHE_STATE_MASK;
env->cache_control |= state;
}
if (env->cache_control & CACHE_CTRL_DF) {
/* Data cache state */
state = (env->cache_control >> 2) & CACHE_STATE_MASK;
if (state == CACHE_ENABLED) {
state = CACHE_FROZEN;
trace_int_helper_dcache_freeze();
}
env->cache_control &= ~(CACHE_STATE_MASK << 2);
env->cache_control |= (state << 2);
}
}
static void leon3_irq_ack(void *irq_manager, int intno)
{
grlib_irqmp_ack((DeviceState *)irq_manager, intno);
}
@ -181,6 +210,12 @@ static void leon3_set_pil_in(void *opaque, int n, int level)
}
}
static void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno)
{
leon3_irq_ack(irq_manager, intno);
leon3_cache_control_int(env);
}
static void leon3_generic_hw_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;

2
hw/sparc/trace-events
View File

@ -19,3 +19,5 @@ sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64
# leon3.c
leon3_set_irq(int intno) "Set CPU IRQ %d"
leon3_reset_irq(int intno) "Reset CPU IRQ %d"
int_helper_icache_freeze(void) "Instruction cache: freeze"
int_helper_dcache_freeze(void) "Data cache: freeze"

6
target/sparc/cpu.h
View File

@ -615,15 +615,9 @@ int cpu_cwp_inc(CPUSPARCState *env1, int cwp);
int cpu_cwp_dec(CPUSPARCState *env1, int cwp);
void cpu_set_cwp(CPUSPARCState *env1, int new_cwp);
/* int_helper.c */
void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno);
/* sun4m.c, sun4u.c */
void cpu_check_irqs(CPUSPARCState *env);
/* leon3.c */
void leon3_irq_ack(void *irq_manager, int intno);
#if defined (TARGET_SPARC64)
static inline int compare_masked(uint64_t x, uint64_t y, uint64_t mask)

37
target/sparc/int32_helper.c
View File

@ -136,40 +136,3 @@ void sparc_cpu_do_interrupt(CPUState *cs)
}
#endif
}
#if !defined(CONFIG_USER_ONLY)
static void leon3_cache_control_int(CPUSPARCState *env)
{
uint32_t state = 0;
if (env->cache_control & CACHE_CTRL_IF) {
/* Instruction cache state */
state = env->cache_control & CACHE_STATE_MASK;
if (state == CACHE_ENABLED) {
state = CACHE_FROZEN;
trace_int_helper_icache_freeze();
}
env->cache_control &= ~CACHE_STATE_MASK;
env->cache_control |= state;
}
if (env->cache_control & CACHE_CTRL_DF) {
/* Data cache state */
state = (env->cache_control >> 2) & CACHE_STATE_MASK;
if (state == CACHE_ENABLED) {
state = CACHE_FROZEN;
trace_int_helper_dcache_freeze();
}
env->cache_control &= ~(CACHE_STATE_MASK << 2);
env->cache_control |= (state << 2);
}
}
void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno)
{
leon3_irq_ack(irq_manager, intno);
leon3_cache_control_int(env);
}
#endif

4
target/sparc/trace-events
View File

@ -15,10 +15,6 @@ int_helper_set_softint(uint32_t softint) "new 0x%08x"
int_helper_clear_softint(uint32_t softint) "new 0x%08x"
int_helper_write_softint(uint32_t softint) "new 0x%08x"
# int32_helper.c
int_helper_icache_freeze(void) "Instruction cache: freeze"
int_helper_dcache_freeze(void) "Data cache: freeze"
# win_helper.c
win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=0x%x"
win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=0x%x new=0x%x"