From 12f1d809e6c0c6ef2466a2629d71e68549dd545e Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Tue, 26 Apr 2022 09:30:08 -0700 Subject: [PATCH] target/arm: Use tcg_constant in disas_movw_imm Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20220426163043.100432-13-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 6c88772eb3..537eebbf1d 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4419,7 +4419,6 @@ static void disas_movw_imm(DisasContext *s, uint32_t insn) int opc = extract32(insn, 29, 2); int pos = extract32(insn, 21, 2) << 4; TCGv_i64 tcg_rd = cpu_reg(s, rd); - TCGv_i64 tcg_imm; if (!sf && (pos >= 32)) { unallocated_encoding(s); @@ -4439,9 +4438,7 @@ static void disas_movw_imm(DisasContext *s, uint32_t insn) tcg_gen_movi_i64(tcg_rd, imm); break; case 3: /* MOVK */ - tcg_imm = tcg_const_i64(imm); - tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_imm, pos, 16); - tcg_temp_free_i64(tcg_imm); + tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_constant_i64(imm), pos, 16); if (!sf) { tcg_gen_ext32u_i64(tcg_rd, tcg_rd); }