hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions
In many of the NVIC registers relating to interrupts, we have to convert from a byte offset within a register set into the number of the first interrupt which is affected. We were getting this wrong for: * reads of NVIC_ISPR<n>, NVIC_ISER<n>, NVIC_ICPR<n>, NVIC_ICER<n>, NVIC_IABR<n> -- in all these cases we were missing the "* 8" needed to convert from the byte offset to the interrupt number (since all these registers use one bit per interrupt) * writes of NVIC_IPR<n> had the opposite problem of a spurious "* 8" (since these registers use one byte per interrupt) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180209165810.6668-9-peter.maydell@linaro.org
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@ -1724,7 +1724,7 @@ static MemTxResult nvic_sysreg_read(void *opaque, hwaddr addr,
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/* fall through */
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case 0x180 ... 0x1bf: /* NVIC Clear enable */
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val = 0;
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startvec = offset - 0x180 + NVIC_FIRST_IRQ; /* vector # */
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startvec = 8 * (offset - 0x180) + NVIC_FIRST_IRQ; /* vector # */
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for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {
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if (s->vectors[startvec + i].enabled &&
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@ -1738,7 +1738,7 @@ static MemTxResult nvic_sysreg_read(void *opaque, hwaddr addr,
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/* fall through */
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case 0x280 ... 0x2bf: /* NVIC Clear pend */
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val = 0;
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startvec = offset - 0x280 + NVIC_FIRST_IRQ; /* vector # */
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startvec = 8 * (offset - 0x280) + NVIC_FIRST_IRQ; /* vector # */
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for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {
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if (s->vectors[startvec + i].pending &&
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(attrs.secure || s->itns[startvec + i])) {
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@ -1748,7 +1748,7 @@ static MemTxResult nvic_sysreg_read(void *opaque, hwaddr addr,
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break;
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case 0x300 ... 0x33f: /* NVIC Active */
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val = 0;
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startvec = offset - 0x300 + NVIC_FIRST_IRQ; /* vector # */
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startvec = 8 * (offset - 0x300) + NVIC_FIRST_IRQ; /* vector # */
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for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) {
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if (s->vectors[startvec + i].active &&
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@ -1863,7 +1863,7 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr,
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case 0x300 ... 0x33f: /* NVIC Active */
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return MEMTX_OK; /* R/O */
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case 0x400 ... 0x5ef: /* NVIC Priority */
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startvec = 8 * (offset - 0x400) + NVIC_FIRST_IRQ; /* vector # */
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startvec = (offset - 0x400) + NVIC_FIRST_IRQ; /* vector # */
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for (i = 0; i < size && startvec + i < s->num_irq; i++) {
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if (attrs.secure || s->itns[startvec + i]) {
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