hw/block/pflash_cfi: Convert from DPRINTF() macro to trace events
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [Fixed lx -> PRIx64 as suggested by Philippe. --Stefan] Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé
Stefan Hajnoczi
parent
1a5396d961
commit
13019f1fd6
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@ -47,6 +47,7 @@
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#include "qemu/log.h"
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#include "hw/sysbus.h"
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#include "sysemu/sysemu.h"
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#include "trace.h"
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#define PFLASH_BUG(fmt, ...) \
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do { \
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@ -120,7 +121,7 @@ static void pflash_timer (void *opaque)
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{
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pflash_t *pfl = opaque;
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DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);
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trace_pflash_timer_expired(pfl->cmd);
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/* Reset flash */
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pfl->status ^= 0x80;
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memory_region_rom_device_set_romd(&pfl->mem, true);
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@ -218,15 +219,14 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset)
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switch (boff & 0xFF) {
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case 0:
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resp = pfl->ident0;
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DPRINTF("%s: Manufacturer Code %04x\n", __func__, resp);
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trace_pflash_manufacturer_id(resp);
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break;
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case 1:
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resp = pfl->ident1;
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DPRINTF("%s: Device ID Code %04x\n", __func__, resp);
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trace_pflash_device_id(resp);
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break;
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default:
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DPRINTF("%s: Read Device Information offset=%x\n", __func__,
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(unsigned)offset);
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trace_pflash_device_info(offset);
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return 0;
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break;
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}
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@ -251,8 +251,7 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
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switch (width) {
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case 1:
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ret = p[offset];
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DPRINTF("%s: data offset " TARGET_FMT_plx " %02x\n",
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__func__, offset, ret);
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trace_pflash_data_read8(offset, ret);
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break;
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case 2:
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if (be) {
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@ -262,8 +261,7 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
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ret = p[offset];
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ret |= p[offset + 1] << 8;
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}
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DPRINTF("%s: data offset " TARGET_FMT_plx " %04x\n",
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__func__, offset, ret);
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trace_pflash_data_read16(offset, ret);
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break;
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case 4:
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if (be) {
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@ -277,8 +275,7 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset,
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ret |= p[offset + 2] << 16;
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ret |= p[offset + 3] << 24;
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}
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DPRINTF("%s: data offset " TARGET_FMT_plx " %08x\n",
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__func__, offset, ret);
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trace_pflash_data_read32(offset, ret);
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break;
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default:
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DPRINTF("BUG in %s\n", __func__);
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@ -294,11 +291,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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uint32_t ret;
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ret = -1;
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#if 0
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DPRINTF("%s: reading offset " TARGET_FMT_plx " under cmd %02x width %d\n",
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__func__, offset, pfl->cmd, width);
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#endif
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trace_pflash_read(offset, pfl->cmd, width, pfl->wcycle);
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switch (pfl->cmd) {
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default:
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/* This should never happen : reset state & treat it as a read */
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@ -349,15 +342,14 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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switch (boff) {
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case 0:
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ret = pfl->ident0 << 8 | pfl->ident1;
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DPRINTF("%s: Manufacturer Code %04x\n", __func__, ret);
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trace_pflash_manufacturer_id(ret);
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break;
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case 1:
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ret = pfl->ident2 << 8 | pfl->ident3;
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DPRINTF("%s: Device ID Code %04x\n", __func__, ret);
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trace_pflash_device_id(ret);
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break;
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default:
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DPRINTF("%s: Read Device Information boff=%x\n", __func__,
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(unsigned)boff);
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trace_pflash_device_info(boff);
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ret = 0;
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break;
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}
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@ -425,9 +417,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset,
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{
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uint8_t *p = pfl->storage;
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DPRINTF("%s: block write offset " TARGET_FMT_plx
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" value %x counter %016" PRIx64 "\n",
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__func__, offset, value, pfl->counter);
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trace_pflash_data_write(offset, value, width, pfl->counter);
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switch (width) {
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case 1:
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p[offset] = value;
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@ -466,9 +456,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
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cmd = value;
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DPRINTF("%s: writing offset " TARGET_FMT_plx " value %08x width %d wcycle 0x%x\n",
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__func__, offset, value, width, pfl->wcycle);
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trace_pflash_write(offset, value, width, pfl->wcycle);
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if (!pfl->wcycle) {
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/* Set the device in I/O access mode */
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memory_region_rom_device_set_romd(&pfl->mem, false);
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@ -656,8 +644,8 @@ static void pflash_write(pflash_t *pfl, hwaddr offset,
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"\n", __func__, offset, pfl->wcycle, pfl->cmd, value);
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reset_flash:
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trace_pflash_reset();
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memory_region_rom_device_set_romd(&pfl->mem, true);
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pfl->wcycle = 0;
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pfl->cmd = 0;
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}
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@ -43,6 +43,7 @@
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#include "sysemu/block-backend.h"
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#include "qemu/host-utils.h"
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#include "hw/sysbus.h"
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#include "trace.h"
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//#define PFLASH_DEBUG
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#ifdef PFLASH_DEBUG
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@ -124,7 +125,7 @@ static void pflash_timer (void *opaque)
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{
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pflash_t *pfl = opaque;
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DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);
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trace_pflash_timer_expired(pfl->cmd);
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/* Reset flash */
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pfl->status ^= 0x80;
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if (pfl->bypass) {
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@ -143,8 +144,8 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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uint32_t ret;
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uint8_t *p;
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DPRINTF("%s: offset " TARGET_FMT_plx "\n", __func__, offset);
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ret = -1;
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trace_pflash_read(offset, pfl->cmd, width, pfl->wcycle);
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/* Lazy reset to ROMD mode after a certain amount of read accesses */
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if (!pfl->rom_mode && pfl->wcycle == 0 &&
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++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) {
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@ -172,7 +173,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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switch (width) {
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case 1:
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ret = p[offset];
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// DPRINTF("%s: data offset %08x %02x\n", __func__, offset, ret);
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trace_pflash_data_read8(offset, ret);
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break;
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case 2:
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if (be) {
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@ -182,7 +183,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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ret = p[offset];
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ret |= p[offset + 1] << 8;
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}
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// DPRINTF("%s: data offset %08x %04x\n", __func__, offset, ret);
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trace_pflash_data_read16(offset, ret);
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break;
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case 4:
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if (be) {
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@ -196,7 +197,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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ret |= p[offset + 2] << 16;
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ret |= p[offset + 3] << 24;
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}
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// DPRINTF("%s: data offset %08x %08x\n", __func__, offset, ret);
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trace_pflash_data_read32(offset, ret);
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break;
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}
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break;
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@ -274,8 +275,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset,
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#endif
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goto reset_flash;
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}
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DPRINTF("%s: offset " TARGET_FMT_plx " %08x %d %d\n", __func__,
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offset, value, width, pfl->wcycle);
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trace_pflash_write(offset, value, width, pfl->wcycle);
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offset &= pfl->chip_len - 1;
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DPRINTF("%s: offset " TARGET_FMT_plx " %08x %d\n", __func__,
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@ -345,8 +345,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset,
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/* We need another unlock sequence */
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goto check_unlock0;
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case 0xA0:
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DPRINTF("%s: write data offset " TARGET_FMT_plx " %08x %d\n",
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__func__, offset, value, width);
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trace_pflash_data_write(offset, value, width, 0);
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p = pfl->storage;
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if (!pfl->ro) {
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switch (width) {
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@ -483,6 +482,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset,
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/* Reset flash */
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reset_flash:
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trace_pflash_reset();
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pfl->bypass = 0;
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pfl->wcycle = 0;
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pfl->cmd = 0;
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@ -4,6 +4,19 @@
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fdc_ioport_read(uint8_t reg, uint8_t value) "read reg 0x%02x val 0x%02x"
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fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x"
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# hw/block/pflash_cfi0?.c
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pflash_reset(void) "reset"
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pflash_read(uint64_t offset, uint8_t cmd, int width, uint8_t wcycle) "offset:0x%04"PRIx64" cmd:0x%02x width:%d wcycle:%u"
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pflash_write(uint64_t offset, uint32_t value, int width, uint8_t wcycle) "offset:0x%04"PRIx64" value:0x%03x width:%d wcycle:%u"
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pflash_timer_expired(uint8_t cmd) "command 0x%02x done"
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pflash_data_read8(uint64_t offset, uint32_t value) "data offset:0x%04"PRIx64" value:0x%02x"
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pflash_data_read16(uint64_t offset, uint32_t value) "data offset:0x%04"PRIx64" value:0x%04x"
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pflash_data_read32(uint64_t offset, uint32_t value) "data offset:0x%04"PRIx64" value:0x%08x"
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pflash_data_write(uint64_t offset, uint32_t value, int width, uint64_t counter) "data offset:0x%04"PRIx64" value:0x%08x width:%d counter:0x%016"PRIx64
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pflash_manufacturer_id(uint16_t id) "Read Manufacturer ID: 0x%04x"
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pflash_device_id(uint16_t id) "Read Device ID: 0x%04x"
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pflash_device_info(uint64_t offset) "Read Device Information offset:0x%04"PRIx64
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# hw/block/virtio-blk.c
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virtio_blk_req_complete(void *vdev, void *req, int status) "vdev %p req %p status %d"
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virtio_blk_rw_complete(void *vdev, void *req, int ret) "vdev %p req %p ret %d"
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