hw/block/nvme: Separate read and write handlers
The majority of code in nvme_rw() is becoming read- or write-specific. Move these parts to two separate handlers, nvme_read() and nvme_write() to make the code more readable and to remove multiple is_write checks that has been present in the i/o path. This is a refactoring patch, no change in functionality. Signed-off-by: Dmitry Fomichev <dmitry.fomichev@wdc.com> Reviewed-by: Niklas Cassel <Niklas.Cassel@wdc.com> Reviewed-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
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107
hw/block/nvme.c
107
hw/block/nvme.c
@ -1176,6 +1176,61 @@ static uint16_t nvme_flush(NvmeCtrl *n, NvmeRequest *req)
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return NVME_NO_COMPLETE;
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}
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static uint16_t nvme_read(NvmeCtrl *n, NvmeRequest *req)
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{
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NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
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NvmeNamespace *ns = req->ns;
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uint64_t slba = le64_to_cpu(rw->slba);
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uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
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uint64_t data_size = nvme_l2b(ns, nlb);
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uint64_t data_offset;
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BlockBackend *blk = ns->blkconf.blk;
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uint16_t status;
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trace_pci_nvme_read(nvme_cid(req), nvme_nsid(ns), nlb, data_size, slba);
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status = nvme_check_mdts(n, data_size);
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if (status) {
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trace_pci_nvme_err_mdts(nvme_cid(req), data_size);
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goto invalid;
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}
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status = nvme_check_bounds(ns, slba, nlb);
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if (status) {
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trace_pci_nvme_err_invalid_lba_range(slba, nlb, ns->id_ns.nsze);
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goto invalid;
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}
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status = nvme_map_dptr(n, data_size, req);
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if (status) {
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goto invalid;
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}
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if (NVME_ERR_REC_DULBE(ns->features.err_rec)) {
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status = nvme_check_dulbe(ns, slba, nlb);
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if (status) {
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goto invalid;
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}
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}
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data_offset = nvme_l2b(ns, slba);
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block_acct_start(blk_get_stats(blk), &req->acct, data_size,
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BLOCK_ACCT_READ);
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if (req->qsg.sg) {
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req->aiocb = dma_blk_read(blk, &req->qsg, data_offset,
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BDRV_SECTOR_SIZE, nvme_rw_cb, req);
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} else {
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req->aiocb = blk_aio_preadv(blk, data_offset, &req->iov, 0,
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nvme_rw_cb, req);
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}
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return NVME_NO_COMPLETE;
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invalid:
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block_acct_invalid(blk_get_stats(blk), BLOCK_ACCT_READ);
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return status | NVME_DNR;
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}
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static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
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{
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NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
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@ -1201,22 +1256,19 @@ static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
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return NVME_NO_COMPLETE;
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}
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static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
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static uint16_t nvme_write(NvmeCtrl *n, NvmeRequest *req)
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{
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NvmeRwCmd *rw = (NvmeRwCmd *)&req->cmd;
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NvmeNamespace *ns = req->ns;
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uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
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uint64_t slba = le64_to_cpu(rw->slba);
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uint32_t nlb = (uint32_t)le16_to_cpu(rw->nlb) + 1;
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uint64_t data_size = nvme_l2b(ns, nlb);
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uint64_t data_offset = nvme_l2b(ns, slba);
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enum BlockAcctType acct = req->cmd.opcode == NVME_CMD_WRITE ?
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BLOCK_ACCT_WRITE : BLOCK_ACCT_READ;
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uint64_t data_offset;
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BlockBackend *blk = ns->blkconf.blk;
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uint16_t status;
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trace_pci_nvme_rw(nvme_cid(req), nvme_io_opc_str(rw->opcode),
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nvme_nsid(ns), nlb, data_size, slba);
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trace_pci_nvme_write(nvme_cid(req), nvme_io_opc_str(rw->opcode),
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nvme_nsid(ns), nlb, data_size, slba);
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status = nvme_check_mdts(n, data_size);
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if (status) {
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@ -1230,43 +1282,27 @@ static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
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goto invalid;
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}
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if (acct == BLOCK_ACCT_READ) {
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if (NVME_ERR_REC_DULBE(ns->features.err_rec)) {
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status = nvme_check_dulbe(ns, slba, nlb);
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if (status) {
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goto invalid;
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}
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}
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}
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status = nvme_map_dptr(n, data_size, req);
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if (status) {
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goto invalid;
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}
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block_acct_start(blk_get_stats(blk), &req->acct, data_size, acct);
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data_offset = nvme_l2b(ns, slba);
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block_acct_start(blk_get_stats(blk), &req->acct, data_size,
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BLOCK_ACCT_WRITE);
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if (req->qsg.sg) {
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if (acct == BLOCK_ACCT_WRITE) {
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req->aiocb = dma_blk_write(blk, &req->qsg, data_offset,
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BDRV_SECTOR_SIZE, nvme_rw_cb, req);
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} else {
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req->aiocb = dma_blk_read(blk, &req->qsg, data_offset,
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BDRV_SECTOR_SIZE, nvme_rw_cb, req);
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}
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req->aiocb = dma_blk_write(blk, &req->qsg, data_offset,
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BDRV_SECTOR_SIZE, nvme_rw_cb, req);
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} else {
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if (acct == BLOCK_ACCT_WRITE) {
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req->aiocb = blk_aio_pwritev(blk, data_offset, &req->iov, 0,
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nvme_rw_cb, req);
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} else {
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req->aiocb = blk_aio_preadv(blk, data_offset, &req->iov, 0,
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nvme_rw_cb, req);
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}
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req->aiocb = blk_aio_pwritev(blk, data_offset, &req->iov, 0,
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nvme_rw_cb, req);
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}
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return NVME_NO_COMPLETE;
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invalid:
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block_acct_invalid(blk_get_stats(ns->blkconf.blk), acct);
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return status;
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block_acct_invalid(blk_get_stats(blk), BLOCK_ACCT_WRITE);
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return status | NVME_DNR;
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}
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static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
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@ -1295,8 +1331,9 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
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case NVME_CMD_WRITE_ZEROES:
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return nvme_write_zeroes(n, req);
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case NVME_CMD_WRITE:
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return nvme_write(n, req);
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case NVME_CMD_READ:
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return nvme_rw(n, req);
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return nvme_read(n, req);
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case NVME_CMD_COMPARE:
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return nvme_compare(n, req);
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case NVME_CMD_DSM:
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@ -40,7 +40,8 @@ pci_nvme_map_prp(uint64_t trans_len, uint32_t len, uint64_t prp1, uint64_t prp2,
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pci_nvme_map_sgl(uint16_t cid, uint8_t typ, uint64_t len) "cid %"PRIu16" type 0x%"PRIx8" len %"PRIu64""
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pci_nvme_io_cmd(uint16_t cid, uint32_t nsid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" nsid %"PRIu32" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
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pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode, const char *opname) "cid %"PRIu16" sqid %"PRIu16" opc 0x%"PRIx8" opname '%s'"
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pci_nvme_rw(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
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pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
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pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
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pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
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pci_nvme_write_zeroes(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32""
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pci_nvme_block_status(int64_t offset, int64_t bytes, int64_t pnum, int ret, bool zeroed) "offset %"PRId64" bytes %"PRId64" pnum %"PRId64" ret 0x%x zeroed %d"
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