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tcg/tci: Make tci_tb_ptr thread-local

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Each thread must have its own pc, even under TCI.

Remove the GETPC ifdef, because GETPC is always available for
helpers, and thus is always required.  Move the assignment
under INDEX_op_call, because the value is only visible when
we make a call to a helper function.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210204014509.882821-6-richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-01-24 10:57:01 -10:00
parent c6fbea4766
commit 13e71f08bf
3 changed files with 4 additions and 9 deletions
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2
include/exec/exec-all.h
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@ -544,7 +544,7 @@ void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr);
/* GETPC is the true target of the return instruction that we'll execute. */ /* GETPC is the true target of the return instruction that we'll execute. */
#if defined(CONFIG_TCG_INTERPRETER) #if defined(CONFIG_TCG_INTERPRETER)
extern uintptr_t tci_tb_ptr; extern __thread uintptr_t tci_tb_ptr;
# define GETPC() tci_tb_ptr # define GETPC() tci_tb_ptr
#else #else
# define GETPC() \ # define GETPC() \

4
tcg/tcg-common.c
View File

@ -25,10 +25,6 @@
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "tcg/tcg.h" #include "tcg/tcg.h"
#if defined(CONFIG_TCG_INTERPRETER)
uintptr_t tci_tb_ptr;
#endif
TCGOpDef tcg_op_defs[] = { TCGOpDef tcg_op_defs[] = {
#define DEF(s, oargs, iargs, cargs, flags) \ #define DEF(s, oargs, iargs, cargs, flags) \
{ #s, oargs, iargs, cargs, iargs + oargs + cargs, flags }, { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },

7
tcg/tci.c
View File

@ -57,6 +57,8 @@ typedef uint64_t (*helper_function)(tcg_target_ulong, tcg_target_ulong,
tcg_target_ulong, tcg_target_ulong); tcg_target_ulong, tcg_target_ulong);
#endif #endif
__thread uintptr_t tci_tb_ptr;
static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index) static tcg_target_ulong tci_read_reg(const tcg_target_ulong *regs, TCGReg index)
{ {
tci_assert(index < TCG_TARGET_NB_REGS); tci_assert(index < TCG_TARGET_NB_REGS);
@ -526,16 +528,13 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
#endif #endif
TCGMemOpIdx oi; TCGMemOpIdx oi;
#if defined(GETPC)
tci_tb_ptr = (uintptr_t)tb_ptr;
#endif
/* Skip opcode and size entry. */ /* Skip opcode and size entry. */
tb_ptr += 2; tb_ptr += 2;
switch (opc) { switch (opc) {
case INDEX_op_call: case INDEX_op_call:
t0 = tci_read_ri(regs, &tb_ptr); t0 = tci_read_ri(regs, &tb_ptr);
tci_tb_ptr = (uintptr_t)tb_ptr;
#if TCG_TARGET_REG_BITS == 32 #if TCG_TARGET_REG_BITS == 32
tmp64 = ((helper_function)t0)(tci_read_reg(regs, TCG_REG_R0), tmp64 = ((helper_function)t0)(tci_read_reg(regs, TCG_REG_R0),
tci_read_reg(regs, TCG_REG_R1), tci_read_reg(regs, TCG_REG_R1),