target-i386: Implement BNDMK
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -71,6 +71,8 @@ static TCGv cpu_cc_dst, cpu_cc_src, cpu_cc_src2, cpu_cc_srcT;
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static TCGv_i32 cpu_cc_op;
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static TCGv cpu_regs[CPU_NB_REGS];
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static TCGv cpu_seg_base[6];
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static TCGv_i64 cpu_bndl[4];
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static TCGv_i64 cpu_bndu[4];
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/* local temps */
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static TCGv cpu_T0, cpu_T1;
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/* local register indexes (only used inside old micro ops) */
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@ -7438,7 +7440,44 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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break;
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}
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break;
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case 0x119 ... 0x11f: /* nop (multi byte) */
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case 0x11b:
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modrm = cpu_ldub_code(env, s->pc++);
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if (s->flags & HF_MPX_EN_MASK) {
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mod = (modrm >> 6) & 3;
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reg = ((modrm >> 3) & 7) | rex_r;
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if (mod != 3 && (prefixes & PREFIX_REPZ)) {
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/* bndmk */
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if (reg >= 4
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|| (prefixes & PREFIX_LOCK)
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|| s->aflag == MO_16) {
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goto illegal_op;
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}
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AddressParts a = gen_lea_modrm_0(env, s, modrm);
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if (a.base >= 0) {
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tcg_gen_extu_tl_i64(cpu_bndl[reg], cpu_regs[a.base]);
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if (!CODE64(s)) {
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tcg_gen_ext32u_i64(cpu_bndl[reg], cpu_bndl[reg]);
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}
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} else if (a.base == -1) {
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/* no base register has lower bound of 0 */
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tcg_gen_movi_i64(cpu_bndl[reg], 0);
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} else {
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/* rip-relative generates #ud */
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goto illegal_op;
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}
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tcg_gen_not_tl(cpu_A0, gen_lea_modrm_1(a));
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if (!CODE64(s)) {
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tcg_gen_ext32u_tl(cpu_A0, cpu_A0);
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}
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tcg_gen_extu_tl_i64(cpu_bndu[reg], cpu_A0);
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/* bnd registers are now in-use */
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gen_set_hflag(s, HF_MPX_IU_MASK);
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break;
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}
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}
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gen_nop_modrm(env, s, modrm);
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break;
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case 0x119: case 0x11a: case 0x11c ... 0x11f: /* nop (multi byte) */
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modrm = cpu_ldub_code(env, s->pc++);
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gen_nop_modrm(env, s, modrm);
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break;
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@ -7803,6 +7842,12 @@ void tcg_x86_init(void)
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[R_GS] = "gs_base",
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[R_SS] = "ss_base",
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};
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static const char bnd_regl_names[4][8] = {
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"bnd0_lb", "bnd1_lb", "bnd2_lb", "bnd3_lb"
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};
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static const char bnd_regu_names[4][8] = {
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"bnd0_ub", "bnd1_ub", "bnd2_ub", "bnd3_ub"
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};
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int i;
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cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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@ -7828,6 +7873,17 @@ void tcg_x86_init(void)
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seg_base_names[i]);
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}
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for (i = 0; i < 4; ++i) {
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cpu_bndl[i]
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= tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUX86State, bnd_regs[i].lb),
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bnd_regl_names[i]);
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cpu_bndu[i]
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= tcg_global_mem_new_i64(cpu_env,
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offsetof(CPUX86State, bnd_regs[i].ub),
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bnd_regu_names[i]);
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}
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helper_lock_init();
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}
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