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Route IOAPIC interrupts via ISA bus

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Instead of calling the IOAPIC from the PIC, raise IOAPIC irqs via the ISA bus.
As a side effect, IOAPIC lines 16-23 are enabled.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Avi Kivity 2009-08-09 19:44:56 +03:00 committed by Anthony Liguori
parent 1452411b25
commit 1632dc6a8f
4 changed files with 13 additions and 26 deletions
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13
hw/i8259.c
View File

@ -60,9 +60,6 @@ struct PicState2 {
PicState pics[2];
qemu_irq parent_irq;
void *irq_request_opaque;
/* IOAPIC callback support */
SetIRQFunc *alt_irq_func;
void *alt_irq_opaque;
};
#if defined(DEBUG_PIC) || defined (DEBUG_IRQ_COUNT)
@ -203,9 +200,6 @@ static void i8259_set_irq(void *opaque, int irq, int level)
}
#endif
pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
/* used for IOAPIC irqs */
if (s->alt_irq_func)
s->alt_irq_func(s->alt_irq_opaque, irq, level);
pic_update_irq(s);
}
@ -562,10 +556,3 @@ qemu_irq *i8259_init(qemu_irq parent_irq)
isa_pic = s;
return qemu_allocate_irqs(i8259_set_irq, s, 16);
}
void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
void *alt_irq_opaque)
{
s->alt_irq_func = alt_irq_func;
s->alt_irq_opaque = alt_irq_opaque;
}

6
hw/ioapic.c
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@ -241,9 +241,10 @@ static CPUWriteMemoryFunc *ioapic_mem_write[3] = {
ioapic_mem_writel,
};
IOAPICState *ioapic_init(void)
qemu_irq *ioapic_init(void)
{
IOAPICState *s;
qemu_irq *irq;
int io_memory;
s = qemu_mallocz(sizeof(IOAPICState));
@ -255,6 +256,7 @@ IOAPICState *ioapic_init(void)
register_savevm("ioapic", 0, 1, ioapic_save, ioapic_load, s);
qemu_register_reset(ioapic_reset, s);
irq = qemu_allocate_irqs(ioapic_set_irq, s, IOAPIC_NUM_PINS);
return s;
return irq;
}

16
hw/pc.c
View File

@ -61,7 +61,6 @@
static fdctrl_t *floppy_controller;
static RTCState *rtc_state;
static PITState *pit;
static IOAPICState *ioapic;
static PCIDevice *i440fx_state;
typedef struct rom_reset_data {
@ -90,14 +89,18 @@ static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
typedef struct isa_irq_state {
qemu_irq *i8259;
qemu_irq *ioapic;
} IsaIrqState;
static void isa_irq_handler(void *opaque, int n, int level)
{
IsaIrqState *isa = (IsaIrqState *)opaque;
qemu_set_irq(isa->i8259[n], level);
}
if (n < 16) {
qemu_set_irq(isa->i8259[n], level);
}
qemu_set_irq(isa->ioapic[n], level);
};
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
{
@ -1282,7 +1285,7 @@ static void pc_init1(ram_addr_t ram_size,
i8259 = i8259_init(cpu_irq[0]);
isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
isa_irq_state->i8259 = i8259;
isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 16);
isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
ferr_irq = isa_irq[13];
if (pci_enabled) {
@ -1324,16 +1327,13 @@ static void pc_init1(ram_addr_t ram_size,
register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
if (pci_enabled) {
ioapic = ioapic_init();
isa_irq_state->ioapic = ioapic_init();
}
pit = pit_init(0x40, isa_irq[0]);
pcspk_init(pit);
if (!no_hpet) {
hpet_init(isa_irq);
}
if (pci_enabled) {
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
}
for(i = 0; i < MAX_SERIAL_PORTS; i++) {
if (serial_hds[i]) {

4
hw/pc.h
View File

@ -26,8 +26,6 @@ extern PicState2 *isa_pic;
void pic_set_irq(int irq, int level);
void pic_set_irq_new(void *opaque, int irq, int level);
qemu_irq *i8259_init(qemu_irq parent_irq);
void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
void *alt_irq_opaque);
int pic_read_irq(PicState2 *s);
void pic_update_irq(PicState2 *s);
uint32_t pic_intack_read(PicState2 *s);
@ -44,7 +42,7 @@ int apic_init(CPUState *env);
int apic_accept_pic_intr(CPUState *env);
void apic_deliver_pic_intr(CPUState *env, int level);
int apic_get_interrupt(CPUState *env);
IOAPICState *ioapic_init(void);
qemu_irq *ioapic_init(void);
void ioapic_set_irq(void *opaque, int vector, int level);
void apic_reset_irq_delivered(void);
int apic_get_irq_delivered(void);