target-xtensa: extract TLB entry setting method
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -381,6 +381,9 @@ void split_tlb_entry_spec_way(const CPUXtensaState *env, uint32_t v, bool dtlb,
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uint32_t *vpn, uint32_t wi, uint32_t *ei);
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int xtensa_tlb_lookup(const CPUXtensaState *env, uint32_t addr, bool dtlb,
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uint32_t *pwi, uint32_t *pei, uint8_t *pring);
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void xtensa_tlb_set_entry_mmu(const CPUXtensaState *env,
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xtensa_tlb_entry *entry, bool dtlb,
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unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte);
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void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
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unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte);
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int xtensa_get_physical_addr(CPUXtensaState *env,
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@ -655,6 +655,16 @@ uint32_t HELPER(ptlb)(uint32_t v, uint32_t dtlb)
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}
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}
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void xtensa_tlb_set_entry_mmu(const CPUXtensaState *env,
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xtensa_tlb_entry *entry, bool dtlb,
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unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte)
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{
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entry->vaddr = vpn;
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entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi);
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entry->asid = (env->sregs[RASID] >> ((pte >> 1) & 0x18)) & 0xff;
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entry->attr = pte & 0xf;
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}
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void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
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unsigned wi, unsigned ei, uint32_t vpn, uint32_t pte)
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{
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@ -665,10 +675,7 @@ void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
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if (entry->asid) {
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tlb_flush_page(env, entry->vaddr);
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}
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entry->vaddr = vpn;
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entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi);
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entry->asid = (env->sregs[RASID] >> ((pte >> 1) & 0x18)) & 0xff;
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entry->attr = pte & 0xf;
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xtensa_tlb_set_entry_mmu(env, entry, dtlb, wi, ei, vpn, pte);
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tlb_flush_page(env, entry->vaddr);
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} else {
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qemu_log("%s %d, %d, %d trying to set immutable entry\n",
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