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target-arm: Rename A32 VFP conversion helpers

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The VFP conversion helpers for A32 round to zero as this is the only
rounding mode supported. Rename these helpers to make it clear that
they round to zero and are not suitable for use in the AArch64 code.

Signed-off-by: Will Newton <will.newton@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Will Newton 2014-01-07 17:19:13 +00:00 committed by Peter Maydell
parent 8ed697e88b
commit 16d5b3caca
3 changed files with 35 additions and 24 deletions
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19
target-arm/helper.c
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@ -3976,7 +3976,7 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUARMState *env)
} }
/* VFP3 fixed point conversion. */ /* VFP3 fixed point conversion. */
#define VFP_CONV_FIX(name, p, fsz, isz, itype) \ #define VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \ float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
void *fpstp) \ void *fpstp) \
{ \ { \
@ -3984,9 +3984,12 @@ float##fsz HELPER(vfp_##name##to##p)(uint##isz##_t x, uint32_t shift, \
float##fsz tmp; \ float##fsz tmp; \
tmp = itype##_to_##float##fsz(x, fpst); \ tmp = itype##_to_##float##fsz(x, fpst); \
return float##fsz##_scalbn(tmp, -(int)shift, fpst); \ return float##fsz##_scalbn(tmp, -(int)shift, fpst); \
} \ }
uint##isz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \
void *fpstp) \ #define VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, round) \
uint##isz##_t HELPER(vfp_to##name##p##round)(float##fsz x, \
uint32_t shift, \
void *fpstp) \
{ \ { \
float_status *fpst = fpstp; \ float_status *fpst = fpstp; \
float##fsz tmp; \ float##fsz tmp; \
@ -3995,9 +3998,13 @@ uint##isz##_t HELPER(vfp_to##name##p)(float##fsz x, uint32_t shift, \
return 0; \ return 0; \
} \ } \
tmp = float##fsz##_scalbn(x, shift, fpst); \ tmp = float##fsz##_scalbn(x, shift, fpst); \
return float##fsz##_to_##itype##_round_to_zero(tmp, fpst); \ return float##fsz##_to_##itype##round(tmp, fpst); \
} }
#define VFP_CONV_FIX(name, p, fsz, isz, itype) \
VFP_CONV_FIX_FLOAT(name, p, fsz, isz, itype) \
VFP_CONV_FLOAT_FIX_ROUND(name, p, fsz, isz, itype, _round_to_zero)
VFP_CONV_FIX(sh, d, 64, 64, int16) VFP_CONV_FIX(sh, d, 64, 64, int16)
VFP_CONV_FIX(sl, d, 64, 64, int32) VFP_CONV_FIX(sl, d, 64, 64, int32)
VFP_CONV_FIX(uh, d, 64, 64, uint16) VFP_CONV_FIX(uh, d, 64, 64, uint16)
@ -4007,6 +4014,8 @@ VFP_CONV_FIX(sl, s, 32, 32, int32)
VFP_CONV_FIX(uh, s, 32, 32, uint16) VFP_CONV_FIX(uh, s, 32, 32, uint16)
VFP_CONV_FIX(ul, s, 32, 32, uint32) VFP_CONV_FIX(ul, s, 32, 32, uint32)
#undef VFP_CONV_FIX #undef VFP_CONV_FIX
#undef VFP_CONV_FIX_FLOAT
#undef VFP_CONV_FLOAT_FIX_ROUND
/* Half precision conversions. */ /* Half precision conversions. */
static float32 do_fcvt_f16_to_f32(uint32_t a, CPUARMState *env, float_status *s) static float32 do_fcvt_f16_to_f32(uint32_t a, CPUARMState *env, float_status *s)

16
target-arm/helper.h
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@ -115,14 +115,14 @@ DEF_HELPER_2(vfp_tosid, i32, f64, ptr)
DEF_HELPER_2(vfp_tosizs, i32, f32, ptr) DEF_HELPER_2(vfp_tosizs, i32, f32, ptr)
DEF_HELPER_2(vfp_tosizd, i32, f64, ptr) DEF_HELPER_2(vfp_tosizd, i32, f64, ptr)
DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_toshs_round_to_zero, i32, f32, i32, ptr)
DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosls_round_to_zero, i32, f32, i32, ptr)
DEF_HELPER_3(vfp_touhs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_touhs_round_to_zero, i32, f32, i32, ptr)
DEF_HELPER_3(vfp_touls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_touls_round_to_zero, i32, f32, i32, ptr)
DEF_HELPER_3(vfp_toshd, i64, f64, i32, ptr) DEF_HELPER_3(vfp_toshd_round_to_zero, i64, f64, i32, ptr)
DEF_HELPER_3(vfp_tosld, i64, f64, i32, ptr) DEF_HELPER_3(vfp_tosld_round_to_zero, i64, f64, i32, ptr)
DEF_HELPER_3(vfp_touhd, i64, f64, i32, ptr) DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, ptr)
DEF_HELPER_3(vfp_tould, i64, f64, i32, ptr) DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr)
DEF_HELPER_3(vfp_shtos, f32, i32, i32, ptr) DEF_HELPER_3(vfp_shtos, f32, i32, i32, ptr)
DEF_HELPER_3(vfp_sltos, f32, i32, i32, ptr) DEF_HELPER_3(vfp_sltos, f32, i32, i32, ptr)
DEF_HELPER_3(vfp_uhtos, f32, i32, i32, ptr) DEF_HELPER_3(vfp_uhtos, f32, i32, i32, ptr)

24
target-arm/translate.c
View File

@ -1098,27 +1098,29 @@ VFP_GEN_FTOI(tosi)
VFP_GEN_FTOI(tosiz) VFP_GEN_FTOI(tosiz)
#undef VFP_GEN_FTOI #undef VFP_GEN_FTOI
#define VFP_GEN_FIX(name) \ #define VFP_GEN_FIX(name, round) \
static inline void gen_vfp_##name(int dp, int shift, int neon) \ static inline void gen_vfp_##name(int dp, int shift, int neon) \
{ \ { \
TCGv_i32 tmp_shift = tcg_const_i32(shift); \ TCGv_i32 tmp_shift = tcg_const_i32(shift); \
TCGv_ptr statusptr = get_fpstatus_ptr(neon); \ TCGv_ptr statusptr = get_fpstatus_ptr(neon); \
if (dp) { \ if (dp) { \
gen_helper_vfp_##name##d(cpu_F0d, cpu_F0d, tmp_shift, statusptr); \ gen_helper_vfp_##name##d##round(cpu_F0d, cpu_F0d, tmp_shift, \
statusptr); \
} else { \ } else { \
gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, tmp_shift, statusptr); \ gen_helper_vfp_##name##s##round(cpu_F0s, cpu_F0s, tmp_shift, \
statusptr); \
} \ } \
tcg_temp_free_i32(tmp_shift); \ tcg_temp_free_i32(tmp_shift); \
tcg_temp_free_ptr(statusptr); \ tcg_temp_free_ptr(statusptr); \
} }
VFP_GEN_FIX(tosh) VFP_GEN_FIX(tosh, _round_to_zero)
VFP_GEN_FIX(tosl) VFP_GEN_FIX(tosl, _round_to_zero)
VFP_GEN_FIX(touh) VFP_GEN_FIX(touh, _round_to_zero)
VFP_GEN_FIX(toul) VFP_GEN_FIX(toul, _round_to_zero)
VFP_GEN_FIX(shto) VFP_GEN_FIX(shto, )
VFP_GEN_FIX(slto) VFP_GEN_FIX(slto, )
VFP_GEN_FIX(uhto) VFP_GEN_FIX(uhto, )
VFP_GEN_FIX(ulto) VFP_GEN_FIX(ulto, )
#undef VFP_GEN_FIX #undef VFP_GEN_FIX
static inline void gen_vfp_ld(DisasContext *s, int dp, TCGv_i32 addr) static inline void gen_vfp_ld(DisasContext *s, int dp, TCGv_i32 addr)