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tcg: Remove TCG_TARGET_TLB_DISPLACEMENT_BITS

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The last use was removed by e77c89fb08.

Fixes: e77c89fb08 ("cputlb: Remove static tlb sizing")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-03-27 17:41:20 -07:00
parent dd906a37c7
commit 194339461b
9 changed files with 0 additions and 9 deletions
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1
tcg/aarch64/tcg-target.h
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@ -16,7 +16,6 @@
#include "host/cpuinfo.h" #include "host/cpuinfo.h"
#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 24
#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) #define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
typedef enum { typedef enum {

1
tcg/arm/tcg-target.h
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@ -31,7 +31,6 @@ extern int arm_arch;
#define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7) #define use_armv7_instructions (__ARM_ARCH >= 7 || arm_arch >= 7)
#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
#define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX #define MAX_CODE_GEN_BUFFER_SIZE UINT32_MAX
typedef enum { typedef enum {

1
tcg/i386/tcg-target.h
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@ -28,7 +28,6 @@
#include "host/cpuinfo.h" #include "host/cpuinfo.h"
#define TCG_TARGET_INSN_UNIT_SIZE 1 #define TCG_TARGET_INSN_UNIT_SIZE 1
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 31
#ifdef __x86_64__ #ifdef __x86_64__
# define TCG_TARGET_REG_BITS 64 # define TCG_TARGET_REG_BITS 64

1
tcg/mips/tcg-target.h
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@ -36,7 +36,6 @@
#endif #endif
#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
#define TCG_TARGET_NB_REGS 32 #define TCG_TARGET_NB_REGS 32
#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) #define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)

1
tcg/ppc/tcg-target.h
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@ -34,7 +34,6 @@
#define TCG_TARGET_NB_REGS 64 #define TCG_TARGET_NB_REGS 64
#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
typedef enum { typedef enum {
TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3,

1
tcg/riscv/tcg-target.h
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@ -35,7 +35,6 @@
#define TCG_TARGET_REG_BITS 64 #define TCG_TARGET_REG_BITS 64
#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 20
#define TCG_TARGET_NB_REGS 32 #define TCG_TARGET_NB_REGS 32
#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) #define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)

1
tcg/s390x/tcg-target.h
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@ -26,7 +26,6 @@
#define S390_TCG_TARGET_H #define S390_TCG_TARGET_H
#define TCG_TARGET_INSN_UNIT_SIZE 2 #define TCG_TARGET_INSN_UNIT_SIZE 2
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
/* We have a +- 4GB range on the branches; leave some slop. */ /* We have a +- 4GB range on the branches; leave some slop. */
#define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB) #define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB)

1
tcg/sparc64/tcg-target.h
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@ -26,7 +26,6 @@
#define SPARC_TCG_TARGET_H #define SPARC_TCG_TARGET_H
#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
#define TCG_TARGET_NB_REGS 32 #define TCG_TARGET_NB_REGS 32
#define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB) #define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB)

1
tcg/tci/tcg-target.h
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@ -42,7 +42,6 @@
#define TCG_TARGET_INTERPRETER 1 #define TCG_TARGET_INTERPRETER 1
#define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_INSN_UNIT_SIZE 4
#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32
#define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) #define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
#if UINTPTR_MAX == UINT32_MAX #if UINTPTR_MAX == UINT32_MAX