target/arm: Recalculate hflags correctly after writes to CONTROL
A write to the CONTROL register can change our current EL (by writing to the nPRIV bit). That means that we can't assume that s->current_el is still valid in trans_MSR_v7m() when we try to rebuild the hflags. Add a new helper rebuild_hflags_m32_newel() which, like the existing rebuild_hflags_a32_newel(), recalculates the current EL from scratch, and use it in trans_MSR_v7m(). This fixes an assertion about an hflags mismatch when the guest changes privilege by writing to CONTROL. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200303174950.3298-4-peter.maydell@linaro.org
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@ -12468,6 +12468,18 @@ void arm_rebuild_hflags(CPUARMState *env)
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env->hflags = rebuild_hflags_internal(env);
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}
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/*
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* If we have triggered a EL state change we can't rely on the
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* translator having passed it to us, we need to recompute.
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*/
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void HELPER(rebuild_hflags_m32_newel)(CPUARMState *env)
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{
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int el = arm_current_el(env);
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int fp_el = fp_exception_el(env, el);
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ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, el);
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env->hflags = rebuild_hflags_m32(env, fp_el, mmu_idx);
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}
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void HELPER(rebuild_hflags_m32)(CPUARMState *env, int el)
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{
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int fp_el = fp_exception_el(env, el);
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@ -90,6 +90,7 @@ DEF_HELPER_4(msr_banked, void, env, i32, i32, i32)
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DEF_HELPER_2(get_user_reg, i32, env, i32)
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DEF_HELPER_3(set_user_reg, void, env, i32, i32)
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DEF_HELPER_FLAGS_1(rebuild_hflags_m32_newel, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_FLAGS_2(rebuild_hflags_m32, TCG_CALL_NO_RWG, void, env, int)
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DEF_HELPER_FLAGS_1(rebuild_hflags_a32_newel, TCG_CALL_NO_RWG, void, env)
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DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int)
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@ -8551,7 +8551,7 @@ static bool trans_MRS_v7m(DisasContext *s, arg_MRS_v7m *a)
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static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7m *a)
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{
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TCGv_i32 addr, reg, el;
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TCGv_i32 addr, reg;
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if (!arm_dc_feature(s, ARM_FEATURE_M)) {
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return false;
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@ -8561,9 +8561,8 @@ static bool trans_MSR_v7m(DisasContext *s, arg_MSR_v7m *a)
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gen_helper_v7m_msr(cpu_env, addr, reg);
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tcg_temp_free_i32(addr);
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tcg_temp_free_i32(reg);
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el = tcg_const_i32(s->current_el);
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gen_helper_rebuild_hflags_m32(cpu_env, el);
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tcg_temp_free_i32(el);
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/* If we wrote to CONTROL, the EL might have changed */
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gen_helper_rebuild_hflags_m32_newel(cpu_env);
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gen_lookup_tb(s);
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return true;
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}
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