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target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree

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Note that gen_ne_fop_DF was incorrectly named and does pass env.
The two sets of helpers should have been unified.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-10-11 16:40:16 -07:00
parent 8c94bcd850
commit 199d43efb1
2 changed files with 30 additions and 40 deletions
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3
target/sparc/insns.decode
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@ -262,11 +262,14 @@ FDIVd 10 ..... 110100 ..... 0 0100 1110 ..... @r_r_r
FDIVq 10 ..... 110100 ..... 0 0100 1111 ..... @r_r_r FDIVq 10 ..... 110100 ..... 0 0100 1111 ..... @r_r_r
FsMULd 10 ..... 110100 ..... 0 0110 1001 ..... @r_r_r FsMULd 10 ..... 110100 ..... 0 0110 1001 ..... @r_r_r
FdMULq 10 ..... 110100 ..... 0 0110 1110 ..... @r_r_r FdMULq 10 ..... 110100 ..... 0 0110 1110 ..... @r_r_r
FsTOx 10 ..... 110100 00000 0 1000 0001 ..... @r_r2
FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2 FdTOx 10 ..... 110100 00000 0 1000 0010 ..... @r_r2
FxTOs 10 ..... 110100 00000 0 1000 0100 ..... @r_r2 FxTOs 10 ..... 110100 00000 0 1000 0100 ..... @r_r2
FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2 FxTOd 10 ..... 110100 00000 0 1000 1000 ..... @r_r2
FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2 FiTOs 10 ..... 110100 00000 0 1100 0100 ..... @r_r2
FdTOs 10 ..... 110100 00000 0 1100 0110 ..... @r_r2 FdTOs 10 ..... 110100 00000 0 1100 0110 ..... @r_r2
FiTOd 10 ..... 110100 00000 0 1100 1000 ..... @r_r2
FsTOd 10 ..... 110100 00000 0 1100 1001 ..... @r_r2
FsTOi 10 ..... 110100 00000 0 1101 0001 ..... @r_r2 FsTOi 10 ..... 110100 00000 0 1101 0001 ..... @r_r2
FdTOi 10 ..... 110100 00000 0 1101 0010 ..... @r_r2 FdTOi 10 ..... 110100 00000 0 1101 0010 ..... @r_r2

67
target/sparc/translate.c
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@ -73,6 +73,7 @@
# define gen_helper_fmuld8sux16 ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fmuld8sux16 ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fmuld8ulx16 ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fmuld8ulx16 ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fpmerge ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fpmerge ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fstox ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fxtod ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fxtod ({ qemu_build_not_reached(); NULL; })
# define gen_helper_fxtos ({ qemu_build_not_reached(); NULL; }) # define gen_helper_fxtos ({ qemu_build_not_reached(); NULL; })
# define gen_helper_pdist ({ qemu_build_not_reached(); NULL; }) # define gen_helper_pdist ({ qemu_build_not_reached(); NULL; })
@ -1670,37 +1671,6 @@ static void gen_ne_fop_QQ(DisasContext *dc, int rd, int rs,
} }
#endif #endif
#ifdef TARGET_SPARC64
static void gen_fop_DF(DisasContext *dc, int rd, int rs,
void (*gen)(TCGv_i64, TCGv_ptr, TCGv_i32))
{
TCGv_i64 dst;
TCGv_i32 src;
src = gen_load_fpr_F(dc, rs);
dst = gen_dest_fpr_D(dc, rd);
gen(dst, tcg_env, src);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
gen_store_fpr_D(dc, rd, dst);
}
#endif
static void gen_ne_fop_DF(DisasContext *dc, int rd, int rs,
void (*gen)(TCGv_i64, TCGv_ptr, TCGv_i32))
{
TCGv_i64 dst;
TCGv_i32 src;
src = gen_load_fpr_F(dc, rs);
dst = gen_dest_fpr_D(dc, rd);
gen(dst, tcg_env, src);
gen_store_fpr_D(dc, rd, dst);
}
static void gen_fop_FQ(DisasContext *dc, int rd, int rs, static void gen_fop_FQ(DisasContext *dc, int rd, int rs,
void (*gen)(TCGv_i32, TCGv_ptr)) void (*gen)(TCGv_i32, TCGv_ptr))
{ {
@ -4768,6 +4738,29 @@ TRANS(FSQRTd, ALL, do_env_dd, a, gen_helper_fsqrtd)
TRANS(FxTOd, 64, do_env_dd, a, gen_helper_fxtod) TRANS(FxTOd, 64, do_env_dd, a, gen_helper_fxtod)
TRANS(FdTOx, 64, do_env_dd, a, gen_helper_fdtox) TRANS(FdTOx, 64, do_env_dd, a, gen_helper_fdtox)
static bool do_env_df(DisasContext *dc, arg_r_r *a,
void (*func)(TCGv_i64, TCGv_env, TCGv_i32))
{
TCGv_i64 dst;
TCGv_i32 src;
if (gen_trap_ifnofpu(dc)) {
return true;
}
gen_op_clear_ieee_excp_and_FTT();
dst = gen_dest_fpr_D(dc, a->rd);
src = gen_load_fpr_F(dc, a->rs);
func(dst, tcg_env, src);
gen_helper_check_ieee_exceptions(cpu_fsr, tcg_env);
gen_store_fpr_D(dc, a->rd, dst);
return advance_pc(dc);
}
TRANS(FiTOd, ALL, do_env_df, a, gen_helper_fitod)
TRANS(FsTOd, ALL, do_env_df, a, gen_helper_fstod)
TRANS(FsTOx, 64, do_env_df, a, gen_helper_fstox)
static bool do_env_qq(DisasContext *dc, arg_r_r *a, static bool do_env_qq(DisasContext *dc, arg_r_r *a,
void (*func)(TCGv_env)) void (*func)(TCGv_env))
{ {
@ -5067,17 +5060,14 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
case 0xc6: /* fdtos */ case 0xc6: /* fdtos */
case 0xd2: /* fdtoi */ case 0xd2: /* fdtoi */
case 0x84: /* V9 fxtos */ case 0x84: /* V9 fxtos */
case 0xc8: /* fitod */
case 0xc9: /* fstod */
case 0x81: /* V9 fstox */
g_assert_not_reached(); /* in decodetree */ g_assert_not_reached(); /* in decodetree */
case 0xc7: /* fqtos */ case 0xc7: /* fqtos */
CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FLOAT128);
gen_fop_FQ(dc, rd, rs2, gen_helper_fqtos); gen_fop_FQ(dc, rd, rs2, gen_helper_fqtos);
break; break;
case 0xc8: /* fitod */
gen_ne_fop_DF(dc, rd, rs2, gen_helper_fitod);
break;
case 0xc9: /* fstod */
gen_ne_fop_DF(dc, rd, rs2, gen_helper_fstod);
break;
case 0xcb: /* fqtod */ case 0xcb: /* fqtod */
CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FLOAT128);
gen_fop_DQ(dc, rd, rs2, gen_helper_fqtod); gen_fop_DQ(dc, rd, rs2, gen_helper_fqtod);
@ -5111,9 +5101,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FLOAT128);
gen_ne_fop_QQ(dc, rd, rs2, gen_helper_fabsq); gen_ne_fop_QQ(dc, rd, rs2, gen_helper_fabsq);
break; break;
case 0x81: /* V9 fstox */
gen_fop_DF(dc, rd, rs2, gen_helper_fstox);
break;
case 0x83: /* V9 fqtox */ case 0x83: /* V9 fqtox */
CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FLOAT128);
gen_fop_DQ(dc, rd, rs2, gen_helper_fqtox); gen_fop_DQ(dc, rd, rs2, gen_helper_fqtox);