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target/arm: Honour -semihosting-config userspace=on 

Honour the commandline -semihosting-config userspace=on option,
instead of never permitting userspace semihosting calls in system
emulation mode, by passing the correct value to the is_userspace
argument of semihosting_enabled(), instead of manually checking and
always forbidding semihosting if the guest is in userspace and this
isn't the linux-user build.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220822141230.3658237-3-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Peter Maydell 2022-08-22 15:12:25 +01:00 committed by Richard Henderson
parent 5202861b20
commit 19b26317e9
2 changed files with 5 additions and 23 deletions
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12
target/arm/translate-a64.c
View File

@ -2219,17 +2219,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
* it is required for halting debug disabled: it will UNDEF. * it is required for halting debug disabled: it will UNDEF.
* Secondly, "HLT 0xf000" is the A64 semihosting syscall instruction. * Secondly, "HLT 0xf000" is the A64 semihosting syscall instruction.
*/ */
if (semihosting_enabled(false) && imm16 == 0xf000) { if (semihosting_enabled(s->current_el == 0) && imm16 == 0xf000) {
#ifndef CONFIG_USER_ONLY
/* In system mode, don't allow userspace access to semihosting,
* to provide some semblance of security (and for consistency
* with our 32-bit semihosting).
*/
if (s->current_el == 0) {
unallocated_encoding(s);
break;
}
#endif
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
} else { } else {
unallocated_encoding(s); unallocated_encoding(s);

16
target/arm/translate.c
View File

@ -1169,10 +1169,7 @@ static inline void gen_hlt(DisasContext *s, int imm)
* semihosting, to provide some semblance of security * semihosting, to provide some semblance of security
* (and for consistency with our 32-bit semihosting). * (and for consistency with our 32-bit semihosting).
*/ */
if (semihosting_enabled(false) && if (semihosting_enabled(s->current_el != 0) &&
#ifndef CONFIG_USER_ONLY
s->current_el != 0 &&
#endif
(imm == (s->thumb ? 0x3c : 0xf000))) { (imm == (s->thumb ? 0x3c : 0xf000))) {
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
return; return;
@ -6556,10 +6553,7 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a)
/* BKPT is OK with ECI set and leaves it untouched */ /* BKPT is OK with ECI set and leaves it untouched */
s->eci_handled = true; s->eci_handled = true;
if (arm_dc_feature(s, ARM_FEATURE_M) && if (arm_dc_feature(s, ARM_FEATURE_M) &&
semihosting_enabled(false) && semihosting_enabled(s->current_el == 0) &&
#ifndef CONFIG_USER_ONLY
!IS_USER(s) &&
#endif
(a->imm == 0xab)) { (a->imm == 0xab)) {
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
} else { } else {
@ -8764,10 +8758,8 @@ static bool trans_SVC(DisasContext *s, arg_SVC *a)
{ {
const uint32_t semihost_imm = s->thumb ? 0xab : 0x123456; const uint32_t semihost_imm = s->thumb ? 0xab : 0x123456;
if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled(false) && if (!arm_dc_feature(s, ARM_FEATURE_M) &&
#ifndef CONFIG_USER_ONLY semihosting_enabled(s->current_el == 0) &&
!IS_USER(s) &&
#endif
(a->imm == semihost_imm)) { (a->imm == semihost_imm)) {
gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST); gen_exception_internal_insn(s, s->pc_curr, EXCP_SEMIHOST);
} else { } else {