From 19ca8285fcd61a8f60f2f44f789a561e0958e8e6 Mon Sep 17 00:00:00 2001 From: Xiaoyao Li Date: Thu, 16 Jul 2020 16:20:18 +0800 Subject: [PATCH] i386/cpu: Clear FEAT_XSAVE_COMP_{LO,HI} when XSAVE is not available Per Intel SDM vol 1, 13.2, if CPUID.1:ECX.XSAVE[bit 26] is 0, the processor provides no further enumeration through CPUID function 0DH. QEMU does not do this for "-cpu host,-xsave". Signed-off-by: Xiaoyao Li Message-Id: <20200716082019.215316-2-xiaoyao.li@intel.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 0ea0630e1f..f37eb7b675 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6267,6 +6267,8 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu) uint64_t mask; if (!(env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE)) { + env->features[FEAT_XSAVE_COMP_LO] = 0; + env->features[FEAT_XSAVE_COMP_HI] = 0; return; }