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target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode

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As described in Chapter 5.7.6 of the UltraSPARC Architecture 2005,
outstanding disrupting exceptions that are destined for privileged mode can only
cause a trap when the virtual processor is in nonprivileged or privileged mode and
PSTATE.ie = 1. At all other times, they are held pending.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Artyom Tarasenko 2016-06-12 22:19:43 +02:00
parent 5b5352b2f4
commit 1a2aefae66
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GPG Key ID: 3360C3F7411A125F
1 changed files with 2 additions and 1 deletions
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target/sparc/cpu.h
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@ -736,8 +736,9 @@ static inline int cpu_interrupts_enabled(CPUSPARCState *env1)
if (env1->psret != 0)
return 1;
#else
if (env1->pstate & PS_IE)
if ((env1->pstate & PS_IE) && !cpu_hypervisor_mode(env1)) {
return 1;
}
#endif
return 0;