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hw: Move ich9.h to southbridge/ 

ICH9 is a south bridge which doesn't necessarily depend on x86, so move
it into the southbridge folder, analoguous to PIIX.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230213173033.98762-13-shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Bernhard Beschow 2023-02-13 18:30:33 +01:00 committed by Philippe Mathieu-Daudé
parent 71671814a8
commit 1a6981bbdc
10 changed files with 12 additions and 11 deletions
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1
MAINTAINERS
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@ -1680,6 +1680,7 @@ F: hw/i2c/smbus_ich9.c
F: hw/acpi/piix4.c
F: hw/acpi/ich9*.c
F: include/hw/acpi/ich9*.h
F: include/hw/southbridge/ich9.h
F: include/hw/southbridge/piix.h
F: hw/isa/apm.c
F: include/hw/isa/apm.h

2
hw/acpi/ich9.c
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@ -36,7 +36,7 @@
#include "hw/acpi/acpi.h"
#include "hw/acpi/ich9_tco.h"
#include "hw/i386/ich9.h"
#include "hw/southbridge/ich9.h"
#include "hw/mem/pc-dimm.h"
#include "hw/mem/nvdimm.h"

2
hw/acpi/ich9_tco.c
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@ -9,7 +9,7 @@
#include "qemu/osdep.h"
#include "sysemu/watchdog.h"
#include "hw/i386/ich9.h"
#include "hw/southbridge/ich9.h"
#include "migration/vmstate.h"
#include "hw/acpi/ich9_tco.h"

2
hw/i2c/smbus_ich9.c
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@ -27,7 +27,7 @@
#include "migration/vmstate.h"
#include "qemu/module.h"
#include "hw/i386/ich9.h"
#include "hw/southbridge/ich9.h"
#include "qom/object.h"
#include "hw/acpi/acpi_aml_interface.h"

2
hw/i386/acpi-build.c
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@ -55,10 +55,10 @@
#include "hw/hyperv/vmbus-bridge.h"
/* Supported chipsets: */
#include "hw/southbridge/ich9.h"
#include "hw/southbridge/piix.h"
#include "hw/acpi/pcihp.h"
#include "hw/i386/fw_cfg.h"
#include "hw/i386/ich9.h"
#include "hw/i386/pc.h"
#include "hw/pci/pci_bus.h"
#include "hw/pci-host/i440fx.h"

2
hw/i386/pc_q35.c
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@ -40,7 +40,6 @@
#include "hw/qdev-properties.h"
#include "hw/i386/x86.h"
#include "hw/i386/pc.h"
#include "hw/i386/ich9.h"
#include "hw/i386/amd_iommu.h"
#include "hw/i386/intel_iommu.h"
#include "hw/display/ramfb.h"
@ -48,6 +47,7 @@
#include "hw/ide/pci.h"
#include "hw/ide/ahci.h"
#include "hw/intc/ioapic.h"
#include "hw/southbridge/ich9.h"
#include "hw/usb.h"
#include "hw/usb/hcd-uhci.h"
#include "qapi/error.h"

2
hw/isa/lpc_ich9.c
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@ -40,7 +40,7 @@
#include "hw/irq.h"
#include "hw/isa/apm.h"
#include "hw/pci/pci.h"
#include "hw/i386/ich9.h"
#include "hw/southbridge/ich9.h"
#include "hw/i386/pc.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/ich9.h"

2
hw/pci-bridge/i82801b11.c
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@ -45,7 +45,7 @@
#include "hw/pci/pci_bridge.h"
#include "migration/vmstate.h"
#include "qemu/module.h"
#include "hw/i386/ich9.h"
#include "hw/southbridge/ich9.h"
/*****************************************************************************/
/* ICH9 DMI-to-PCI bridge */

6
include/hw/i386/ich9.h → include/hw/southbridge/ich9.h
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@ -1,5 +1,5 @@
#ifndef HW_ICH9_H
#define HW_ICH9_H
#ifndef HW_SOUTHBRIDGE_ICH9_H
#define HW_SOUTHBRIDGE_ICH9_H
#include "hw/isa/apm.h"
#include "hw/acpi/ich9.h"
@ -242,4 +242,4 @@ struct ICH9LPCState {
#define ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT 1
#define ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT 2
#endif /* HW_ICH9_H */
#endif /* HW_SOUTHBRIDGE_ICH9_H */

2
tests/qtest/tco-test.c
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@ -14,7 +14,7 @@
#include "libqos/pci-pc.h"
#include "qapi/qmp/qdict.h"
#include "hw/pci/pci_regs.h"
#include "hw/i386/ich9.h"
#include "hw/southbridge/ich9.h"
#include "hw/acpi/ich9.h"
#include "hw/acpi/ich9_tco.h"