OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

target-cris: QOM'ify CPU reset 

Move code from cpu_state_reset() into QOM cris_cpu_reset().
Let CPU init call cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
Andreas Färber 2012-04-11 23:35:40 +02:00 committed by Edgar E. Iglesias
parent e739a48e58
commit 1c3b52fb1a
2 changed files with 24 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
target-cris/cpu.c
View File

@ -1,6 +1,9 @@
/*
* QEMU CRIS CPU
*
* Copyright (c) 2008 AXIS Communications AB
* Written by Edgar E. Iglesias.
*
* Copyright (c) 2012 SUSE LINUX Products GmbH
*
* This library is free software; you can redistribute it and/or
@ -20,6 +23,7 @@
#include "cpu.h"
#include "qemu-common.h"
#include "mmu.h"
/* CPUClass::reset() */
@ -28,10 +32,27 @@ static void cris_cpu_reset(CPUState *s)
CRISCPU *cpu = CRIS_CPU(s);
CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(cpu);
CPUCRISState *env = &cpu->env;
uint32_t vr;
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
log_cpu_state(env, 0);
}
ccc->parent_reset(s);
cpu_state_reset(env);
vr = env->pregs[PR_VR];
memset(env, 0, offsetof(CPUCRISState, breakpoints));
env->pregs[PR_VR] = vr;
tlb_flush(env, 1);
#if defined(CONFIG_USER_ONLY)
/* start in user mode with interrupts enabled. */
env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG;
#else
cris_mmu_init(env);
env->pregs[PR_CCS] = 0;
#endif
}
static void cris_cpu_class_init(ObjectClass *oc, void *data)

22
target-cris/translate.c
View File

@ -3515,7 +3515,7 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
env->pregs[PR_VR] = vr_by_name(cpu_model);
cpu_exec_init(env);
cpu_state_reset(env);
cpu_reset(CPU(cpu));
qemu_init_vcpu(env);
if (tcg_initialized)
@ -3577,25 +3577,7 @@ CPUCRISState *cpu_cris_init (const char *cpu_model)
void cpu_state_reset(CPUCRISState *env)
{
uint32_t vr;
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
log_cpu_state(env, 0);
}
vr = env->pregs[PR_VR];
memset(env, 0, offsetof(CPUCRISState, breakpoints));
env->pregs[PR_VR] = vr;
tlb_flush(env, 1);
#if defined(CONFIG_USER_ONLY)
/* start in user mode with interrupts enabled. */
env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG;
#else
cris_mmu_init(env);
env->pregs[PR_CCS] = 0;
#endif
cpu_reset(ENV_GET_CPU(env));
}
void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos)