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target-arm: convert void helpers

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Add an explicit CPUState parameter instead of relying on AREG0.

For easier review, convert only op helpers which don't return any value.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Blue Swirl 2012-09-04 20:08:34 +00:00
parent 04a130eaa1
commit 1ce94f81ec
3 changed files with 18 additions and 18 deletions
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8
target-arm/helper.h
View File

@ -50,10 +50,10 @@ DEF_HELPER_2(usad8, i32, i32, i32)
DEF_HELPER_1(logicq_cc, i32, i64)
DEF_HELPER_3(sel_flags, i32, i32, i32, i32)
DEF_HELPER_1(exception, void, i32)
DEF_HELPER_0(wfi, void)
DEF_HELPER_2(exception, void, env, i32)
DEF_HELPER_1(wfi, void, env)
DEF_HELPER_2(cpsr_write, void, i32, i32)
DEF_HELPER_3(cpsr_write, void, env, i32, i32)
DEF_HELPER_0(cpsr_read, i32)
DEF_HELPER_3(v7m_msr, void, env, i32, i32)
@ -68,7 +68,7 @@ DEF_HELPER_2(get_r13_banked, i32, env, i32)
DEF_HELPER_3(set_r13_banked, void, env, i32, i32)
DEF_HELPER_1(get_user_reg, i32, i32)
DEF_HELPER_2(set_user_reg, void, i32, i32)
DEF_HELPER_3(set_user_reg, void, env, i32, i32)
DEF_HELPER_1(vfp_get_fpscr, i32, env)
DEF_HELPER_2(vfp_set_fpscr, void, env, i32)

20
target-arm/op_helper.c
View File

@ -23,7 +23,7 @@
#define SIGNBIT (uint32_t)0x80000000
#define SIGNBIT64 ((uint64_t)1 << 63)
static void raise_exception(int tt)
static void raise_exception(CPUARMState *env, int tt)
{
env->exception_index = tt;
cpu_loop_exit(env);
@ -93,7 +93,7 @@ void tlb_fill(CPUARMState *env1, target_ulong addr, int is_write, int mmu_idx,
cpu_restore_state(tb, env, retaddr);
}
}
raise_exception(env->exception_index);
raise_exception(env, env->exception_index);
}
env = saved_env;
}
@ -230,14 +230,14 @@ uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
return res;
}
void HELPER(wfi)(void)
void HELPER(wfi)(CPUARMState *env)
{
env->exception_index = EXCP_HLT;
env->halted = 1;
cpu_loop_exit(env);
}
void HELPER(exception)(uint32_t excp)
void HELPER(exception)(CPUARMState *env, uint32_t excp)
{
env->exception_index = excp;
cpu_loop_exit(env);
@ -248,7 +248,7 @@ uint32_t HELPER(cpsr_read)(void)
return cpsr_read(env) & ~CPSR_EXEC;
}
void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
void HELPER(cpsr_write)(CPUARMState *env, uint32_t val, uint32_t mask)
{
cpsr_write(env, val, mask);
}
@ -271,7 +271,7 @@ uint32_t HELPER(get_user_reg)(uint32_t regno)
return val;
}
void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
void HELPER(set_user_reg)(CPUARMState *env, uint32_t regno, uint32_t val)
{
if (regno == 13) {
env->banked_r13[0] = val;
@ -290,7 +290,7 @@ void HELPER(set_cp_reg)(CPUARMState *env, void *rip, uint32_t value)
const ARMCPRegInfo *ri = rip;
int excp = ri->writefn(env, ri, value);
if (excp) {
raise_exception(excp);
raise_exception(env, excp);
}
}
@ -300,7 +300,7 @@ uint32_t HELPER(get_cp_reg)(CPUARMState *env, void *rip)
uint64_t value;
int excp = ri->readfn(env, ri, &value);
if (excp) {
raise_exception(excp);
raise_exception(env, excp);
}
return value;
}
@ -310,7 +310,7 @@ void HELPER(set_cp_reg64)(CPUARMState *env, void *rip, uint64_t value)
const ARMCPRegInfo *ri = rip;
int excp = ri->writefn(env, ri, value);
if (excp) {
raise_exception(excp);
raise_exception(env, excp);
}
}
@ -320,7 +320,7 @@ uint64_t HELPER(get_cp_reg64)(CPUARMState *env, void *rip)
uint64_t value;
int excp = ri->readfn(env, ri, &value);
if (excp) {
raise_exception(excp);
raise_exception(env, excp);
}
return value;
}

8
target-arm/translate.c
View File

@ -199,7 +199,7 @@ static void store_reg(DisasContext *s, int reg, TCGv var)
static inline void gen_set_cpsr(TCGv var, uint32_t mask)
{
TCGv tmp_mask = tcg_const_i32(mask);
gen_helper_cpsr_write(var, tmp_mask);
gen_helper_cpsr_write(cpu_env, var, tmp_mask);
tcg_temp_free_i32(tmp_mask);
}
/* Set NZCV flags from the high 4 bits of var. */
@ -209,7 +209,7 @@ static void gen_exception(int excp)
{
TCGv tmp = tcg_temp_new_i32();
tcg_gen_movi_i32(tmp, excp);
gen_helper_exception(tmp);
gen_helper_exception(cpu_env, tmp);
tcg_temp_free_i32(tmp);
}
@ -7719,7 +7719,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
tmp = gen_ld32(addr, IS_USER(s));
if (user) {
tmp2 = tcg_const_i32(i);
gen_helper_set_user_reg(tmp2, tmp);
gen_helper_set_user_reg(cpu_env, tmp2, tmp);
tcg_temp_free_i32(tmp2);
tcg_temp_free_i32(tmp);
} else if (i == rn) {
@ -9913,7 +9913,7 @@ static inline void gen_intermediate_code_internal(CPUARMState *env,
/* nothing more to generate */
break;
case DISAS_WFI:
gen_helper_wfi();
gen_helper_wfi(cpu_env);
break;
case DISAS_SWI:
gen_exception(EXCP_SWI);