target/i386: reimplement 0x0f 0xd8-0xdf, 0xe8-0xef, 0xf8-0xff, add AVX
These are more simple integer instructions present in both MMX and SSE/AVX, with no holes that were later occupied by newer instructions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -273,6 +273,34 @@ static const X86OpEntry opcodes_0F[256] = {
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[0x6d] = X86_OP_ENTRY3(PUNPCKHQDQ, V,x, H,x, W,x, vex4 p_66 avx2_256),
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[0x6d] = X86_OP_ENTRY3(PUNPCKHQDQ, V,x, H,x, W,x, vex4 p_66 avx2_256),
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[0x6e] = X86_OP_ENTRY3(MOVD_to, V,x, None,None, E,y, vex5 mmx p_00_66), /* wrong dest Vy on SDM! */
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[0x6e] = X86_OP_ENTRY3(MOVD_to, V,x, None,None, E,y, vex5 mmx p_00_66), /* wrong dest Vy on SDM! */
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[0x6f] = X86_OP_GROUP0(0F6F),
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[0x6f] = X86_OP_GROUP0(0F6F),
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/* Incorrectly missing from 2-17 */
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[0xd8] = X86_OP_ENTRY3(PSUBUSB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xd9] = X86_OP_ENTRY3(PSUBUSW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xda] = X86_OP_ENTRY3(PMINUB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xdb] = X86_OP_ENTRY3(PAND, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xdc] = X86_OP_ENTRY3(PADDUSB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xdd] = X86_OP_ENTRY3(PADDUSW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xde] = X86_OP_ENTRY3(PMAXUB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xdf] = X86_OP_ENTRY3(PANDN, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xe8] = X86_OP_ENTRY3(PSUBSB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xe9] = X86_OP_ENTRY3(PSUBSW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xea] = X86_OP_ENTRY3(PMINSW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xeb] = X86_OP_ENTRY3(POR, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xec] = X86_OP_ENTRY3(PADDSB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xed] = X86_OP_ENTRY3(PADDSW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xee] = X86_OP_ENTRY3(PMAXSW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xef] = X86_OP_ENTRY3(PXOR, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xf8] = X86_OP_ENTRY3(PSUBB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xf9] = X86_OP_ENTRY3(PSUBW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xfa] = X86_OP_ENTRY3(PSUBD, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xfb] = X86_OP_ENTRY3(PSUBQ, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xfc] = X86_OP_ENTRY3(PADDB, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xfd] = X86_OP_ENTRY3(PADDW, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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[0xfe] = X86_OP_ENTRY3(PADDD, V,x, H,x, W,x, vex4 mmx avx2_256 p_00_66),
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/* 0xff = UD0 */
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};
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};
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static void do_decode_0F(DisasContext *s, CPUX86State *env, X86OpEntry *entry, uint8_t *b)
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static void do_decode_0F(DisasContext *s, CPUX86State *env, X86OpEntry *entry, uint8_t *b)
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@ -328,9 +328,31 @@ static void gen_##uname(DisasContext *s, CPUX86State *env, X86DecodedInsn *decod
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decode->op[2].offset, vec_len, vec_len); \
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decode->op[2].offset, vec_len, vec_len); \
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}
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}
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BINARY_INT_GVEC(PADDB, tcg_gen_gvec_add, MO_8)
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BINARY_INT_GVEC(PADDW, tcg_gen_gvec_add, MO_16)
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BINARY_INT_GVEC(PADDD, tcg_gen_gvec_add, MO_32)
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BINARY_INT_GVEC(PADDSB, tcg_gen_gvec_ssadd, MO_8)
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BINARY_INT_GVEC(PADDSW, tcg_gen_gvec_ssadd, MO_16)
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BINARY_INT_GVEC(PADDUSB, tcg_gen_gvec_usadd, MO_8)
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BINARY_INT_GVEC(PADDUSW, tcg_gen_gvec_usadd, MO_16)
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BINARY_INT_GVEC(PAND, tcg_gen_gvec_and, MO_64)
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BINARY_INT_GVEC(PCMPGTB, tcg_gen_gvec_cmp, TCG_COND_GT, MO_8)
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BINARY_INT_GVEC(PCMPGTB, tcg_gen_gvec_cmp, TCG_COND_GT, MO_8)
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BINARY_INT_GVEC(PCMPGTW, tcg_gen_gvec_cmp, TCG_COND_GT, MO_16)
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BINARY_INT_GVEC(PCMPGTW, tcg_gen_gvec_cmp, TCG_COND_GT, MO_16)
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BINARY_INT_GVEC(PCMPGTD, tcg_gen_gvec_cmp, TCG_COND_GT, MO_32)
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BINARY_INT_GVEC(PCMPGTD, tcg_gen_gvec_cmp, TCG_COND_GT, MO_32)
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BINARY_INT_GVEC(PMAXSW, tcg_gen_gvec_smax, MO_16)
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BINARY_INT_GVEC(PMAXUB, tcg_gen_gvec_umax, MO_8)
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BINARY_INT_GVEC(PMINSW, tcg_gen_gvec_smin, MO_16)
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BINARY_INT_GVEC(PMINUB, tcg_gen_gvec_umin, MO_8)
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BINARY_INT_GVEC(POR, tcg_gen_gvec_or, MO_64)
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BINARY_INT_GVEC(PSUBB, tcg_gen_gvec_sub, MO_8)
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BINARY_INT_GVEC(PSUBW, tcg_gen_gvec_sub, MO_16)
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BINARY_INT_GVEC(PSUBD, tcg_gen_gvec_sub, MO_32)
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BINARY_INT_GVEC(PSUBQ, tcg_gen_gvec_sub, MO_64)
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BINARY_INT_GVEC(PSUBSB, tcg_gen_gvec_sssub, MO_8)
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BINARY_INT_GVEC(PSUBSW, tcg_gen_gvec_sssub, MO_16)
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BINARY_INT_GVEC(PSUBUSB, tcg_gen_gvec_ussub, MO_8)
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BINARY_INT_GVEC(PSUBUSW, tcg_gen_gvec_ussub, MO_16)
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BINARY_INT_GVEC(PXOR, tcg_gen_gvec_xor, MO_64)
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/*
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/*
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@ -608,6 +630,16 @@ static void gen_MULX(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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}
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}
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static void gen_PANDN(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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{
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int vec_len = vector_len(s, decode);
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/* Careful, operand order is reversed! */
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tcg_gen_gvec_andc(MO_64,
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decode->op[0].offset, decode->op[2].offset,
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decode->op[1].offset, vec_len, vec_len);
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}
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static void gen_PDEP(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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static void gen_PDEP(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
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{
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{
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MemOp ot = decode->op[1].ot;
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MemOp ot = decode->op[1].ot;
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@ -4781,7 +4781,9 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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use_new &= b <= limit;
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use_new &= b <= limit;
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#endif
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#endif
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if (use_new && (b >= 0x160 && b <= 0x16f)) {
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if (use_new &&
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((b >= 0x160 && b <= 0x16f) ||
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(b >= 0x1d8 && b <= 0x1ff && (b & 8)))) {
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disas_insn_new(s, cpu, b + 0x100);
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disas_insn_new(s, cpu, b + 0x100);
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return s->pc;
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return s->pc;
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}
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}
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