OpenE2K/qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

cmd646: allow MRDMODE interrupt status bits clearing from PCI config space

Browse Source 
Make sure that we also update the normal DMA interrupt status bits at the
same time, and alter the IRQ if being cleared accordingly.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Mark Cave-Ayland 2014-08-08 17:23:35 +01:00 committed by Stefan Hajnoczi
parent dab91a1e13
commit 1d113ef874
1 changed files with 30 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
hw/ide/cmd646.c
View File

@ -243,8 +243,6 @@ static void bmdma_setup_bar(PCIIDEState *d)
} }
} }
/* XXX: call it also when the MRDMODE is changed from the PCI config
registers */
static void cmd646_update_irq(PCIDevice *pd) static void cmd646_update_irq(PCIDevice *pd)
{ {
int pci_level; int pci_level;
@ -283,6 +281,30 @@ static void cmd646_reset(void *opaque)
} }
} }
static uint32_t cmd646_pci_config_read(PCIDevice *d,
uint32_t address, int len)
{
return pci_default_read_config(d, address, len);
}
static void cmd646_pci_config_write(PCIDevice *d, uint32_t addr, uint32_t val,
int l)
{
uint32_t i;
pci_default_write_config(d, addr, val, l);
for (i = addr; i < addr + l; i++) {
switch (i) {
case MRDMODE:
cmd646_update_dma_interrupts(d);
break;
}
}
cmd646_update_irq(d);
}
/* CMD646 PCI IDE controller */ /* CMD646 PCI IDE controller */
static int pci_cmd646_ide_initfn(PCIDevice *dev) static int pci_cmd646_ide_initfn(PCIDevice *dev)
{ {
@ -299,6 +321,10 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
pci_conf[CNTRL] |= CNTRL_EN_CH1; /* enable IDE1 */ pci_conf[CNTRL] |= CNTRL_EN_CH1; /* enable IDE1 */
} }
/* Set write-to-clear interrupt bits */
dev->wmask[MRDMODE] = 0x0;
dev->w1cmask[MRDMODE] = MRDMODE_INTR_CH0 | MRDMODE_INTR_CH1;
setup_cmd646_bar(d, 0); setup_cmd646_bar(d, 0);
setup_cmd646_bar(d, 1); setup_cmd646_bar(d, 1);
pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].data); pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->cmd646_bar[0].data);
@ -371,6 +397,8 @@ static void cmd646_ide_class_init(ObjectClass *klass, void *data)
k->device_id = PCI_DEVICE_ID_CMD_646; k->device_id = PCI_DEVICE_ID_CMD_646;
k->revision = 0x07; k->revision = 0x07;
k->class_id = PCI_CLASS_STORAGE_IDE; k->class_id = PCI_CLASS_STORAGE_IDE;
k->config_read = cmd646_pci_config_read;
k->config_write = cmd646_pci_config_write;
dc->props = cmd646_ide_properties; dc->props = cmd646_ide_properties;
} }