rtc: make rtc_xxx accept/return ISADevice instead of RTCState.

To match rtc_xxx with qdev, make rtc_xxx accept and return ISADevice
instead of RTCState.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Isaku Yamahata 2010-05-14 16:29:17 +09:00 committed by Blue Swirl
parent e1460e4707
commit 1d914fa0af
9 changed files with 34 additions and 26 deletions

View File

@ -28,6 +28,7 @@
#include "apic.h" #include "apic.h"
#include "isa.h" #include "isa.h"
#include "hpet_emul.h" #include "hpet_emul.h"
#include "mc146818rtc.h"
//#define DEBUG_CMOS //#define DEBUG_CMOS
@ -65,7 +66,7 @@
#define REG_C_PF 0x40 #define REG_C_PF 0x40
#define REG_C_AF 0x20 #define REG_C_AF 0x20
struct RTCState { typedef struct RTCState {
ISADevice dev; ISADevice dev;
uint8_t cmos_data[128]; uint8_t cmos_data[128];
uint8_t cmos_index; uint8_t cmos_index;
@ -85,7 +86,7 @@ struct RTCState {
QEMUTimer *coalesced_timer; QEMUTimer *coalesced_timer;
QEMUTimer *second_timer; QEMUTimer *second_timer;
QEMUTimer *second_timer2; QEMUTimer *second_timer2;
}; } RTCState;
static void rtc_irq_raise(qemu_irq irq) static void rtc_irq_raise(qemu_irq irq)
{ {
@ -492,14 +493,16 @@ static uint32_t cmos_ioport_read(void *opaque, uint32_t addr)
} }
} }
void rtc_set_memory(RTCState *s, int addr, int val) void rtc_set_memory(ISADevice *dev, int addr, int val)
{ {
RTCState *s = DO_UPCAST(RTCState, dev, dev);
if (addr >= 0 && addr <= 127) if (addr >= 0 && addr <= 127)
s->cmos_data[addr] = val; s->cmos_data[addr] = val;
} }
void rtc_set_date(RTCState *s, const struct tm *tm) void rtc_set_date(ISADevice *dev, const struct tm *tm)
{ {
RTCState *s = DO_UPCAST(RTCState, dev, dev);
s->current_tm = *tm; s->current_tm = *tm;
rtc_copy_date(s); rtc_copy_date(s);
} }
@ -508,18 +511,19 @@ void rtc_set_date(RTCState *s, const struct tm *tm)
#define REG_IBM_CENTURY_BYTE 0x32 #define REG_IBM_CENTURY_BYTE 0x32
#define REG_IBM_PS2_CENTURY_BYTE 0x37 #define REG_IBM_PS2_CENTURY_BYTE 0x37
static void rtc_set_date_from_host(RTCState *s) static void rtc_set_date_from_host(ISADevice *dev)
{ {
RTCState *s = DO_UPCAST(RTCState, dev, dev);
struct tm tm; struct tm tm;
int val; int val;
/* set the CMOS date */ /* set the CMOS date */
qemu_get_timedate(&tm, 0); qemu_get_timedate(&tm, 0);
rtc_set_date(s, &tm); rtc_set_date(dev, &tm);
val = rtc_to_bcd(s, (tm.tm_year / 100) + 19); val = rtc_to_bcd(s, (tm.tm_year / 100) + 19);
rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val); rtc_set_memory(dev, REG_IBM_CENTURY_BYTE, val);
rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val); rtc_set_memory(dev, REG_IBM_PS2_CENTURY_BYTE, val);
} }
static int rtc_post_load(void *opaque, int version_id) static int rtc_post_load(void *opaque, int version_id)
@ -591,7 +595,7 @@ static int rtc_initfn(ISADevice *dev)
s->cmos_data[RTC_REG_C] = 0x00; s->cmos_data[RTC_REG_C] = 0x00;
s->cmos_data[RTC_REG_D] = 0x80; s->cmos_data[RTC_REG_D] = 0x80;
rtc_set_date_from_host(s); rtc_set_date_from_host(dev);
s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s); s->periodic_timer = qemu_new_timer(rtc_clock, rtc_periodic_timer, s);
#ifdef TARGET_I386 #ifdef TARGET_I386
@ -614,14 +618,14 @@ static int rtc_initfn(ISADevice *dev)
return 0; return 0;
} }
RTCState *rtc_init(int base_year) ISADevice *rtc_init(int base_year)
{ {
ISADevice *dev; ISADevice *dev;
dev = isa_create("mc146818rtc"); dev = isa_create("mc146818rtc");
qdev_prop_set_int32(&dev->qdev, "base_year", base_year); qdev_prop_set_int32(&dev->qdev, "base_year", base_year);
qdev_init_nofail(&dev->qdev); qdev_init_nofail(&dev->qdev);
return DO_UPCAST(RTCState, dev, dev); return dev;
} }
static ISADeviceInfo mc146818rtc_info = { static ISADeviceInfo mc146818rtc_info = {

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@ -1,10 +1,10 @@
#ifndef MC146818RTC_H #ifndef MC146818RTC_H
#define MC146818RTC_H #define MC146818RTC_H
typedef struct RTCState RTCState; #include "isa.h"
RTCState *rtc_init(int base_year); ISADevice *rtc_init(int base_year);
void rtc_set_memory(RTCState *s, int addr, int val); void rtc_set_memory(ISADevice *dev, int addr, int val);
void rtc_set_date(RTCState *s, const struct tm *tm); void rtc_set_date(ISADevice *dev, const struct tm *tm);
#endif /* !MC146818RTC_H */ #endif /* !MC146818RTC_H */

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@ -35,6 +35,7 @@
#include "esp.h" #include "esp.h"
#include "mips-bios.h" #include "mips-bios.h"
#include "loader.h" #include "loader.h"
#include "mc146818rtc.h"
enum jazz_model_e enum jazz_model_e
{ {

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@ -44,6 +44,7 @@
#include "ide.h" #include "ide.h"
#include "loader.h" #include "loader.h"
#include "elf.h" #include "elf.h"
#include "mc146818rtc.h"
//#define DEBUG_BOARD_INIT //#define DEBUG_BOARD_INIT
@ -776,7 +777,7 @@ void mips_malta_init (ram_addr_t ram_size,
PCIBus *pci_bus; PCIBus *pci_bus;
ISADevice *isa_dev; ISADevice *isa_dev;
CPUState *env; CPUState *env;
RTCState *rtc_state; ISADevice *rtc_state;
FDCtrl *floppy_controller; FDCtrl *floppy_controller;
MaltaFPGAState *malta_fpga; MaltaFPGAState *malta_fpga;
qemu_irq *i8259; qemu_irq *i8259;

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@ -21,6 +21,7 @@
#include "ide.h" #include "ide.h"
#include "loader.h" #include "loader.h"
#include "elf.h" #include "elf.h"
#include "mc146818rtc.h"
#define MAX_IDE_BUS 2 #define MAX_IDE_BUS 2
@ -165,7 +166,7 @@ void mips_r4k_init (ram_addr_t ram_size,
int bios_size; int bios_size;
CPUState *env; CPUState *env;
ResetData *reset_info; ResetData *reset_info;
RTCState *rtc_state; ISADevice *rtc_state;
int i; int i;
qemu_irq *i8259; qemu_irq *i8259;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

11
hw/pc.c
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@ -34,6 +34,7 @@
#include "loader.h" #include "loader.h"
#include "elf.h" #include "elf.h"
#include "multiboot.h" #include "multiboot.h"
#include "mc146818rtc.h"
/* output Bochs bios info messages */ /* output Bochs bios info messages */
//#define DEBUG_BIOS //#define DEBUG_BIOS
@ -192,7 +193,7 @@ static int cmos_get_fd_drive_type(int fd0)
} }
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd, static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd,
RTCState *s) ISADevice *s)
{ {
int cylinders, heads, sectors; int cylinders, heads, sectors;
bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors); bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
@ -225,7 +226,7 @@ static int boot_device2nibble(char boot_device)
return 0; return 0;
} }
static int set_boot_dev(RTCState *s, const char *boot_device, int fd_bootchk) static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk)
{ {
#define PC_MAX_BOOT_DEVICES 3 #define PC_MAX_BOOT_DEVICES 3
int nbds, bds[3] = { 0, }; int nbds, bds[3] = { 0, };
@ -257,7 +258,7 @@ static int pc_boot_set(void *opaque, const char *boot_device)
/* hd_table must contain 4 block drivers */ /* hd_table must contain 4 block drivers */
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
const char *boot_device, DriveInfo **hd_table, const char *boot_device, DriveInfo **hd_table,
FDCtrl *floppy_controller, RTCState *s) FDCtrl *floppy_controller, ISADevice *s)
{ {
int val; int val;
int fd0, fd1, nb; int fd0, fd1, nb;
@ -752,7 +753,7 @@ int cpu_is_bsp(CPUState *env)
BIOS will read it and start S3 resume at POST Entry */ BIOS will read it and start S3 resume at POST Entry */
void pc_cmos_set_s3_resume(void *opaque, int irq, int level) void pc_cmos_set_s3_resume(void *opaque, int irq, int level)
{ {
RTCState *s = opaque; ISADevice *s = opaque;
if (level) { if (level) {
rtc_set_memory(s, 0xF, 0xFE); rtc_set_memory(s, 0xF, 0xFE);
@ -929,7 +930,7 @@ void pc_vga_init(PCIBus *pci_bus)
void pc_basic_device_init(qemu_irq *isa_irq, void pc_basic_device_init(qemu_irq *isa_irq,
FDCtrl **floppy_controller, FDCtrl **floppy_controller,
RTCState **rtc_state) ISADevice **rtc_state)
{ {
int i; int i;
DriveInfo *fd[MAX_FD]; DriveInfo *fd[MAX_FD];

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@ -5,7 +5,6 @@
#include "ioport.h" #include "ioport.h"
#include "isa.h" #include "isa.h"
#include "fdc.h" #include "fdc.h"
#include "mc146818rtc.h"
/* PC-style peripherals (also used by other machines). */ /* PC-style peripherals (also used by other machines). */
@ -95,14 +94,14 @@ qemu_irq *pc_allocate_cpu_irq(void);
void pc_vga_init(PCIBus *pci_bus); void pc_vga_init(PCIBus *pci_bus);
void pc_basic_device_init(qemu_irq *isa_irq, void pc_basic_device_init(qemu_irq *isa_irq,
FDCtrl **floppy_controller, FDCtrl **floppy_controller,
RTCState **rtc_state); ISADevice **rtc_state);
void pc_init_ne2k_isa(NICInfo *nd); void pc_init_ne2k_isa(NICInfo *nd);
#ifdef HAS_AUDIO #ifdef HAS_AUDIO
void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic); void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic);
#endif #endif
void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
const char *boot_device, DriveInfo **hd_table, const char *boot_device, DriveInfo **hd_table,
FDCtrl *floppy_controller, RTCState *s); FDCtrl *floppy_controller, ISADevice *s);
void pc_pci_device_init(PCIBus *pci_bus); void pc_pci_device_init(PCIBus *pci_bus);
void ioport_set_a20(int enable); void ioport_set_a20(int enable);

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@ -61,7 +61,7 @@ static void pc_init1(ram_addr_t ram_size,
IsaIrqState *isa_irq_state; IsaIrqState *isa_irq_state;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
FDCtrl *floppy_controller; FDCtrl *floppy_controller;
RTCState *rtc_state; ISADevice *rtc_state;
pc_cpus_init(cpu_model); pc_cpus_init(cpu_model);

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@ -36,6 +36,7 @@
#include "qemu-log.h" #include "qemu-log.h"
#include "ide.h" #include "ide.h"
#include "loader.h" #include "loader.h"
#include "mc146818rtc.h"
//#define HARD_DEBUG_PPC_IO //#define HARD_DEBUG_PPC_IO
//#define DEBUG_PPC_IO //#define DEBUG_PPC_IO