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tcg-mips: Improve setcond eq/ne vs zeros

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The original code results in one too many insns per zero
present in the input.  And since comparing 64-bit numbers
vs zero is common...

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson 2014-04-15 22:41:46 -07:00
parent 9a2f0bfe32
commit 1db1c4d7d9
1 changed files with 36 additions and 4 deletions
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40
tcg/mips/tcg-target.c
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@ -701,6 +701,40 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGReg arg1,
tcg_out_nop(s);
}
static TCGReg tcg_out_reduce_eq2(TCGContext *s, TCGReg tmp0, TCGReg tmp1,
TCGReg al, TCGReg ah,
TCGReg bl, TCGReg bh)
{
/* Merge highpart comparison into AH. */
if (bh != 0) {
if (ah != 0) {
tcg_out_opc_reg(s, OPC_XOR, tmp0, ah, bh);
ah = tmp0;
} else {
ah = bh;
}
}
/* Merge lowpart comparison into AL. */
if (bl != 0) {
if (al != 0) {
tcg_out_opc_reg(s, OPC_XOR, tmp1, al, bl);
al = tmp1;
} else {
al = bl;
}
}
/* Merge high and low part comparisons into AL. */
if (ah != 0) {
if (al != 0) {
tcg_out_opc_reg(s, OPC_OR, tmp0, ah, al);
al = tmp0;
} else {
al = ah;
}
}
return al;
}
static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
TCGReg al, TCGReg ah, TCGReg bl, TCGReg bh)
{
@ -716,10 +750,8 @@ static void tcg_out_setcond2(TCGContext *s, TCGCond cond, TCGReg ret,
switch (cond) {
case TCG_COND_EQ:
case TCG_COND_NE:
tcg_out_setcond(s, cond, tmp0, ah, bh);
tcg_out_setcond(s, cond, ret, al, bl);
tcg_out_opc_reg(s, (cond == TCG_COND_EQ ? OPC_AND : OPC_OR),
ret, ret, tmp0);
tmp1 = tcg_out_reduce_eq2(s, tmp0, tmp1, al, ah, bl, bh);
tcg_out_setcond(s, cond, ret, tmp1, TCG_REG_ZERO);
break;
default: