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Queued target/hppa patches 

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Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20190206' into staging

Queued target/hppa patches

# gpg: Signature made Wed 06 Feb 2019 10:50:06 GMT
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-hppa-20190206:
  target/hppa: fix PSW Q bit behaviour to match hardware
  target/hppa: fix setting registers via gdb
  target/hppa: use tb_cflags() to access tb->cflags

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2019-02-07 12:55:28 +00:00
parent 713acc316d 68aa851aa2
commit 1dca054955
3 changed files with 11 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
target/hppa/gdbstub.c
View File

@ -266,7 +266,7 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
case 65 ... 127:
{
uint64_t *fr = &env->fr[(n - 64) / 2];
*fr = deposit64(*fr, val, (n & 1 ? 0 : 32), 32);
*fr = deposit64(*fr, (n & 1 ? 0 : 32), 32, val);
}
break;
default:

14
target/hppa/op_helper.c
View File

@ -665,11 +665,15 @@ void HELPER(reset)(CPUHPPAState *env)
target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
{
target_ulong psw = env->psw;
/* ??? On second reading this condition simply seems
to be undefined rather than a diagnosed trap. */
if (nsm & ~psw & PSW_Q) {
hppa_dynamic_excp(env, EXCP_ILL, GETPC());
}
/*
* Setting the PSW Q bit to 1, if it was not already 1, is an
* undefined operation.
*
* However, HP-UX 10.20 does this with the SSM instruction.
* Tested this on HP9000/712 and HP9000/785/C3750 and both
* machines set the Q bit from 0 to 1 without an exception,
* so let this go without comment.
*/
env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
return psw & PSW_SM;
}

2
target/hppa/translate.c
View File

@ -2059,7 +2059,7 @@ static DisasJumpType trans_mfctl(DisasContext *ctx, uint32_t insn,
/* FIXME: Respect PSW_S bit. */
nullify_over(ctx);
tmp = dest_gpr(ctx, rt);
if (ctx->base.tb->cflags & CF_USE_ICOUNT) {
if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
gen_io_start();
gen_helper_read_interval_timer(tmp);
gen_io_end();