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target/riscv: Change gen_goto_tb to work on displacements 

Reduce reliance on absolute value to prepare for PC-relative translation.

Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230526072124.298466-4-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Weiwei Li 2023-05-26 15:21:20 +08:00 committed by Alistair Francis
parent 8ef23a329a
commit 1df8497b9d
2 changed files with 7 additions and 5 deletions
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4
target/riscv/insn_trans/trans_rvi.c.inc
View File

@ -171,7 +171,7 @@ static bool gen_branch(DisasContext *ctx, arg_b *a, TCGCond cond)
} else {
tcg_gen_brcond_tl(cond, src1, src2, l);
}
gen_goto_tb(ctx, 1, ctx->pc_succ_insn);
gen_goto_tb(ctx, 1, ctx->cur_insn_len);
gen_set_label(l); /* branch taken */
@ -183,7 +183,7 @@ static bool gen_branch(DisasContext *ctx, arg_b *a, TCGCond cond)
gen_pc_plus_diff(target_pc, ctx, next_pc);
gen_exception_inst_addr_mis(ctx, target_pc);
} else {
gen_goto_tb(ctx, 0, ctx->base.pc_next + a->imm);
gen_goto_tb(ctx, 0, a->imm);
}
ctx->base.is_jmp = DISAS_NORETURN;

8
target/riscv/translate.c
View File

@ -283,8 +283,10 @@ static void exit_tb(DisasContext *ctx)
tcg_gen_exit_tb(NULL, 0);
}
static void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
static void gen_goto_tb(DisasContext *ctx, int n, target_long diff)
{
target_ulong dest = ctx->base.pc_next + diff;
/*
* Under itrigger, instruction executes one by one like singlestep,
* direct block chain benefits will be small.
@ -559,7 +561,7 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)
}
gen_set_gpri(ctx, rd, ctx->pc_succ_insn);
gen_goto_tb(ctx, 0, ctx->base.pc_next + imm); /* must use this for safety */
gen_goto_tb(ctx, 0, imm); /* must use this for safety */
ctx->base.is_jmp = DISAS_NORETURN;
}
@ -1231,7 +1233,7 @@ static void riscv_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
switch (ctx->base.is_jmp) {
case DISAS_TOO_MANY:
gen_goto_tb(ctx, 0, ctx->base.pc_next);
gen_goto_tb(ctx, 0, 0);
break;
case DISAS_NORETURN:
break;