OpenE2K
/
qemu-e2k
13
4
Fork 0
Code Issues 4 Pull Requests Projects 2 Releases Activity

target-arm: Suppress TBI for S2 translations 

Stage-2 MMU translations do not have configurable TBI as
the top byte is always 0 (48-bit IPAs).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1442135278-25281-5-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Edgar E. Iglesias 2015-09-14 14:39:50 +01:00 committed by Peter Maydell
parent b698e9cfd2
commit 1edee4708a
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
target-arm/helper.c
View File

@ -6370,7 +6370,9 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
if (arm_el_is_aa64(env, el)) {
va_size = 64;
if (el > 1) {
tbi = extract64(tcr->raw_tcr, 20, 1);
if (mmu_idx != ARMMMUIdx_S2NS) {
tbi = extract64(tcr->raw_tcr, 20, 1);
}
} else {
if (extract64(address, 55, 1)) {
tbi = extract64(tcr->raw_tcr, 38, 1);