OpenE2K/qemu-e2k
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switch ide bus to inplace allocation.

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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Gerd Hoffmann 2009-09-16 22:25:30 +02:00 committed by Anthony Liguori
parent b2317837f0
commit 1f850f1064
4 changed files with 36 additions and 39 deletions
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2
hw/ide/internal.h
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@ -551,7 +551,7 @@ void ide_init2(IDEBus *bus, DriveInfo *hd0, DriveInfo *hd1,
void ide_init_ioport(IDEBus *bus, int iobase, int iobase2);
/* hw/ide/qdev.c */
IDEBus *ide_bus_new(DeviceState *dev);
void ide_bus_new(IDEBus *idebus, DeviceState *dev);
IDEDevice *ide_create_drive(IDEBus *bus, int unit, DriveInfo *drive);
#endif /* HW_IDE_INTERNAL_H */

24
hw/ide/isa.c
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@ -37,7 +37,7 @@
typedef struct ISAIDEState {
ISADevice dev;
IDEBus *bus;
IDEBus bus;
uint32_t iobase;
uint32_t iobase2;
uint32_t isairq;
@ -48,18 +48,18 @@ static void isa_ide_save(QEMUFile* f, void *opaque)
{
ISAIDEState *s = opaque;
idebus_save(f, s->bus);
ide_save(f, &s->bus->ifs[0]);
ide_save(f, &s->bus->ifs[1]);
idebus_save(f, &s->bus);
ide_save(f, &s->bus.ifs[0]);
ide_save(f, &s->bus.ifs[1]);
}
static int isa_ide_load(QEMUFile* f, void *opaque, int version_id)
{
ISAIDEState *s = opaque;
idebus_load(f, s->bus, version_id);
ide_load(f, &s->bus->ifs[0], version_id);
ide_load(f, &s->bus->ifs[1], version_id);
idebus_load(f, &s->bus, version_id);
ide_load(f, &s->bus.ifs[0], version_id);
ide_load(f, &s->bus.ifs[1], version_id);
return 0;
}
@ -67,10 +67,10 @@ static int isa_ide_initfn(ISADevice *dev)
{
ISAIDEState *s = DO_UPCAST(ISAIDEState, dev, dev);
s->bus = ide_bus_new(&s->dev.qdev);
ide_init_ioport(s->bus, s->iobase, s->iobase2);
ide_bus_new(&s->bus, &s->dev.qdev);
ide_init_ioport(&s->bus, s->iobase, s->iobase2);
isa_init_irq(dev, &s->irq, s->isairq);
ide_init2(s->bus, NULL, NULL, s->irq);
ide_init2(&s->bus, NULL, NULL, s->irq);
register_savevm("isa-ide", 0, 3, isa_ide_save, isa_ide_load, s);
return 0;
};
@ -90,9 +90,9 @@ int isa_ide_init(int iobase, int iobase2, int isairq,
s = DO_UPCAST(ISAIDEState, dev, dev);
if (hd0)
ide_create_drive(s->bus, 0, hd0);
ide_create_drive(&s->bus, 0, hd0);
if (hd1)
ide_create_drive(s->bus, 1, hd1);
ide_create_drive(&s->bus, 1, hd1);
return 0;
}

42
hw/ide/pci.c
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@ -51,7 +51,7 @@
typedef struct PCIIDEState {
PCIDevice dev;
IDEBus *bus[2];
IDEBus bus[2];
BMDMAState bmdma[2];
int type; /* see IDE_TYPE_xxx */
uint32_t secondary;
@ -66,7 +66,7 @@ static void ide_map(PCIDevice *pci_dev, int region_num,
IDEBus *bus;
if (region_num <= 3) {
bus = d->bus[(region_num >> 1)];
bus = &d->bus[(region_num >> 1)];
if (region_num & 1) {
register_ioport_read(addr + 2, 1, 1, ide_status_read, bus);
register_ioport_write(addr + 2, 1, 1, ide_cmd_write, bus);
@ -252,9 +252,9 @@ static void bmdma_map(PCIDevice *pci_dev, int region_num,
for(i = 0;i < 2; i++) {
BMDMAState *bm = &d->bmdma[i];
d->bus[i]->bmdma = bm;
d->bus[i].bmdma = bm;
bm->pci_dev = DO_UPCAST(PCIIDEState, dev, pci_dev);
bm->bus = d->bus[i];
bm->bus = d->bus+i;
qemu_add_vm_change_state_handler(ide_dma_restart_cb, bm);
register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
@ -294,13 +294,13 @@ static void pci_ide_save(QEMUFile* f, void *opaque)
/* per IDE interface data */
for(i = 0; i < 2; i++) {
idebus_save(f, d->bus[i]);
idebus_save(f, d->bus+i);
}
/* per IDE drive data */
for(i = 0; i < 2; i++) {
ide_save(f, &d->bus[i]->ifs[0]);
ide_save(f, &d->bus[i]->ifs[1]);
ide_save(f, &d->bus[i].ifs[0]);
ide_save(f, &d->bus[i].ifs[1]);
}
}
@ -330,13 +330,13 @@ static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
/* per IDE interface data */
for(i = 0; i < 2; i++) {
idebus_load(f, d->bus[i], version_id);
idebus_load(f, d->bus+i, version_id);
}
/* per IDE drive data */
for(i = 0; i < 2; i++) {
ide_load(f, &d->bus[i]->ifs[0], version_id);
ide_load(f, &d->bus[i]->ifs[1], version_id);
ide_load(f, &d->bus[i].ifs[0], version_id);
ide_load(f, &d->bus[i].ifs[1], version_id);
}
return 0;
}
@ -351,7 +351,7 @@ static void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table)
for (i = 0; i < 4; i++) {
if (hd_table[i] == NULL)
continue;
ide_create_drive(d->bus[bus[i]], unit[i], hd_table[i]);
ide_create_drive(d->bus+bus[i], unit[i], hd_table[i]);
}
}
@ -427,10 +427,10 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev)
pci_conf[0x3d] = 0x01; // interrupt on pin 1
irq = qemu_allocate_irqs(cmd646_set_irq, d, 2);
d->bus[0] = ide_bus_new(&d->dev.qdev);
d->bus[1] = ide_bus_new(&d->dev.qdev);
ide_init2(d->bus[0], NULL, NULL, irq[0]);
ide_init2(d->bus[1], NULL, NULL, irq[1]);
ide_bus_new(&d->bus[0], &d->dev.qdev);
ide_bus_new(&d->bus[1], &d->dev.qdev);
ide_init2(&d->bus[0], NULL, NULL, irq[0]);
ide_init2(&d->bus[1], NULL, NULL, irq[1]);
register_savevm("ide", 0, 3, pci_ide_save, pci_ide_load, d);
qemu_register_reset(cmd646_reset, d);
@ -482,13 +482,13 @@ static int pci_piix_ide_initfn(PCIIDEState *d)
register_savevm("ide", 0, 3, pci_ide_save, pci_ide_load, d);
d->bus[0] = ide_bus_new(&d->dev.qdev);
d->bus[1] = ide_bus_new(&d->dev.qdev);
ide_init_ioport(d->bus[0], 0x1f0, 0x3f6);
ide_init_ioport(d->bus[1], 0x170, 0x376);
ide_bus_new(&d->bus[0], &d->dev.qdev);
ide_bus_new(&d->bus[1], &d->dev.qdev);
ide_init_ioport(&d->bus[0], 0x1f0, 0x3f6);
ide_init_ioport(&d->bus[1], 0x170, 0x376);
ide_init2(d->bus[0], NULL, NULL, isa_reserve_irq(14));
ide_init2(d->bus[1], NULL, NULL, isa_reserve_irq(15));
ide_init2(&d->bus[0], NULL, NULL, isa_reserve_irq(14));
ide_init2(&d->bus[1], NULL, NULL, isa_reserve_irq(15));
return 0;
}

7
hw/ide/qdev.c
View File

@ -29,12 +29,9 @@ static struct BusInfo ide_bus_info = {
.size = sizeof(IDEBus),
};
IDEBus *ide_bus_new(DeviceState *dev)
void ide_bus_new(IDEBus *idebus, DeviceState *dev)
{
IDEBus *idebus;
idebus = FROM_QBUS(IDEBus, qbus_create(&ide_bus_info, dev, NULL));
return idebus;
qbus_create_inplace(&idebus->qbus, &ide_bus_info, dev, NULL);
}
static int ide_qdev_init(DeviceState *qdev, DeviceInfo *base)