Xen 2017/09/20

-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZwyHSAAoJEIlPj0hw4a6Q10IQAJrLgoWembEgBi0oIQ6wYFfJ
 zzMr0Oy0HAZtzHVu44abqkN2a5d8ea75YY+JCmujFQHTrx0YDn64To6m4XBmOzEn
 Fq5a+bBfMC/CdepBjeV/Q5muDG1/tZMMDqMz9+Y1vb613asKZVDLzTnrbDMqHin0
 sOGfAZoYH15FvyhMkVHeUKEYiQ+jAhpdpdAJU7dPqhs/orpD+9HY+Kby65I2+aZK
 Pi3v3Dtswi5/1mk5Z5MQe68N0C1VtPQBwyEVaD3xfpB/dj8NjX5wXZBR89kwYrSL
 zHxtK2CHGtDaHT06aCKW5fM140cH5w8RQfIEruHIDVbzT56+xGcKlrJl3/IKs9N6
 Davb1MmO89mrQFT8tquIw+fri39rwZB61UsMsU6n9Aj7TImg5nK9gWswA+VT9cOL
 YVFKf4pBEMvCHg544IqNFiO/fcgYpHth8yBvReYaOvG6aIVEtc8y+6tCEAQls0rA
 l0l6rHLrJgbiHwfZ45eh2HWlnBSLpanxUig7EPwagozpse6qAfgw2iF4P4igKHG2
 p1ehzObWATufYWHggELadAyNDFHn+msNkZilKZAT27nAgzDPHcIRb6AhNd8zcSeo
 FoBaXk4v8mBLtHbxzLHwPu5NDUmTQxYv0K7vAD/oM38dttAk5+LKkN/N2AIn4xhG
 3lQjHpF41WzrEIIETVj3
 =SMKC
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/sstabellini/tags/xen-20170920-tag' into staging

Xen 2017/09/20

# gpg: Signature made Thu 21 Sep 2017 03:20:02 BST
# gpg:                using RSA key 0x894F8F4870E1AE90
# gpg: Good signature from "Stefano Stabellini <stefano.stabellini@eu.citrix.com>"
# gpg:                 aka "Stefano Stabellini <sstabellini@kernel.org>"
# Primary key fingerprint: D04E 33AB A51F 67BA 07D3  0AEA 894F 8F48 70E1 AE90

* remotes/sstabellini/tags/xen-20170920-tag:
  xen/pt: allow QEMU to request MSI unmasking at bind time
  xen-disk: use g_new0 to fix build

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2017-09-21 10:18:02 +01:00
commit 211ad3b412
4 changed files with 30 additions and 6 deletions

View File

@ -1232,7 +1232,7 @@ static int blk_connect(struct XenDevice *xendev)
return -1;
}
domids = g_malloc0_n(blkdev->nr_ring_ref, sizeof(uint32_t));
domids = g_new0(uint32_t, blkdev->nr_ring_ref);
for (i = 0; i < blkdev->nr_ring_ref; i++) {
domids[i] = blkdev->xendev.dom;
}

View File

@ -180,6 +180,7 @@ typedef struct XenPTMSI {
uint32_t addr_hi; /* guest message upper address */
uint16_t data; /* guest message data */
uint32_t ctrl_offset; /* saved control offset */
uint32_t mask; /* guest mask bits */
int pirq; /* guest pirq corresponding */
bool initialized; /* when guest MSI is initialized */
bool mapped; /* when pirq is mapped */

View File

@ -1315,6 +1315,22 @@ static int xen_pt_msgdata_reg_write(XenPCIPassthroughState *s,
return 0;
}
static int xen_pt_mask_reg_write(XenPCIPassthroughState *s, XenPTReg *cfg_entry,
uint32_t *val, uint32_t dev_value,
uint32_t valid_mask)
{
int rc;
rc = xen_pt_long_reg_write(s, cfg_entry, val, dev_value, valid_mask);
if (rc) {
return rc;
}
s->msi->mask = *val;
return 0;
}
/* MSI Capability Structure reg static information table */
static XenPTRegInfo xen_pt_emu_reg_msi[] = {
/* Next Pointer reg */
@ -1393,7 +1409,7 @@ static XenPTRegInfo xen_pt_emu_reg_msi[] = {
.emu_mask = 0xFFFFFFFF,
.init = xen_pt_mask_reg_init,
.u.dw.read = xen_pt_long_reg_read,
.u.dw.write = xen_pt_long_reg_write,
.u.dw.write = xen_pt_mask_reg_write,
},
/* Mask reg (if PCI_MSI_FLAGS_MASKBIT set, for 64-bit devices) */
{
@ -1404,7 +1420,7 @@ static XenPTRegInfo xen_pt_emu_reg_msi[] = {
.emu_mask = 0xFFFFFFFF,
.init = xen_pt_mask_reg_init,
.u.dw.read = xen_pt_long_reg_read,
.u.dw.write = xen_pt_long_reg_write,
.u.dw.write = xen_pt_mask_reg_write,
},
/* Pending reg (if PCI_MSI_FLAGS_MASKBIT set, for 32-bit devices) */
{

View File

@ -24,6 +24,7 @@
#define XEN_PT_GFLAGS_SHIFT_DM 9
#define XEN_PT_GFLAGSSHIFT_DELIV_MODE 12
#define XEN_PT_GFLAGSSHIFT_TRG_MODE 15
#define XEN_PT_GFLAGSSHIFT_UNMASKED 16
#define latch(fld) latch[PCI_MSIX_ENTRY_##fld / sizeof(uint32_t)]
@ -155,7 +156,8 @@ static int msi_msix_update(XenPCIPassthroughState *s,
int pirq,
bool is_msix,
int msix_entry,
int *old_pirq)
int *old_pirq,
bool masked)
{
PCIDevice *d = &s->dev;
uint8_t gvec = msi_vector(data);
@ -171,6 +173,8 @@ static int msi_msix_update(XenPCIPassthroughState *s,
table_addr = s->msix->mmio_base_addr;
}
gflags |= masked ? 0 : (1u << XEN_PT_GFLAGSSHIFT_UNMASKED);
rc = xc_domain_update_msi_irq(xen_xc, xen_domid, gvec,
pirq, gflags, table_addr);
@ -273,8 +277,10 @@ int xen_pt_msi_setup(XenPCIPassthroughState *s)
int xen_pt_msi_update(XenPCIPassthroughState *s)
{
XenPTMSI *msi = s->msi;
/* Current MSI emulation in QEMU only supports 1 vector */
return msi_msix_update(s, msi_addr64(msi), msi->data, msi->pirq,
false, 0, &msi->pirq);
false, 0, &msi->pirq, msi->mask & 1);
}
void xen_pt_msi_disable(XenPCIPassthroughState *s)
@ -355,7 +361,8 @@ static int xen_pt_msix_update_one(XenPCIPassthroughState *s, int entry_nr,
}
rc = msi_msix_update(s, entry->addr, entry->data, pirq, true,
entry_nr, &entry->pirq);
entry_nr, &entry->pirq,
vec_ctrl & PCI_MSIX_ENTRY_CTRL_MASKBIT);
if (!rc) {
entry->updated = false;