hw/i386/acpi-build: Deny control on PCIe Native Hot-plug in _OSC
There are two ways to enable ACPI PCI Hot-plug: * Disable the Hot-plug Capable bit on PCIe slots. This was the first approach which led to regression [1-2], as I/O space for a port is allocated only when it is hot-pluggable, which is determined by HPC bit. * Leave the HPC bit on and disable PCIe Native Hot-plug in _OSC method. This removes the (future) ability of hot-plugging switches with PCIe Native hotplug since ACPI PCI Hot-plug only works with cold-plugged bridges. If the user wants to explicitely use this feature, they can disable ACPI PCI Hot-plug with: --global ICH9-LPC.acpi-pci-hotplug-with-bridge-support=off Change the bit in _OSC method so that the OS selects ACPI PCI Hot-plug instead of PCIe Native. [1] https://gitlab.com/qemu-project/qemu/-/issues/641 [2] https://bugzilla.redhat.com/show_bug.cgi?id=2006409 Signed-off-by: Julia Suvorova <jusual@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20211112110857.3116853-5-imammedo@redhat.com> Reviewed-by: Ani Sinha <ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -1337,7 +1337,7 @@ static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
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aml_append(table, scope);
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}
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static Aml *build_q35_osc_method(void)
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static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
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{
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Aml *if_ctx;
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Aml *if_ctx2;
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@ -1359,8 +1359,10 @@ static Aml *build_q35_osc_method(void)
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/*
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* Always allow native PME, AER (no dependencies)
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* Allow SHPC (PCI bridges can have SHPC controller)
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* Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
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*/
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aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
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aml_append(if_ctx, aml_and(a_ctrl,
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aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
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if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
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/* Unknown revision */
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@ -1449,7 +1451,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
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aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
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aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
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aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
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aml_append(dev, build_q35_osc_method());
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aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
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aml_append(sb_scope, dev);
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if (mcfg_valid) {
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aml_append(sb_scope, build_q35_dram_controller(&mcfg));
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@ -1565,7 +1567,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
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if (pci_bus_is_express(bus)) {
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
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aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
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aml_append(dev, build_q35_osc_method());
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/* Expander bridges do not have ACPI PCI Hot-plug enabled */
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aml_append(dev, build_q35_osc_method(true));
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} else {
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
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}
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