target-ppc: Introduce DFP Subtract

Add emulation of the PowerPC Decimal Floating Point Subtract instructions
dsub[q][.]

Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Tom Musta 2014-04-21 15:55:02 -05:00 committed by Alexander Graf
parent a9d7ba03b0
commit 2128f8a57e
3 changed files with 24 additions and 1 deletions

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@ -256,6 +256,11 @@ static void dfp_check_for_VXISI_add(struct PPC_DFP *dfp)
dfp_check_for_VXISI(dfp, 0); dfp_check_for_VXISI(dfp, 0);
} }
static void dfp_check_for_VXISI_subtract(struct PPC_DFP *dfp)
{
dfp_check_for_VXISI(dfp, 1);
}
#define DFP_HELPER_TAB(op, dnop, postprocs, size) \ #define DFP_HELPER_TAB(op, dnop, postprocs, size) \
void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a, uint64_t *b) \ void helper_##op(CPUPPCState *env, uint64_t *t, uint64_t *a, uint64_t *b) \
{ \ { \
@ -284,3 +289,16 @@ static void ADD_PPs(struct PPC_DFP *dfp)
DFP_HELPER_TAB(dadd, decNumberAdd, ADD_PPs, 64) DFP_HELPER_TAB(dadd, decNumberAdd, ADD_PPs, 64)
DFP_HELPER_TAB(daddq, decNumberAdd, ADD_PPs, 128) DFP_HELPER_TAB(daddq, decNumberAdd, ADD_PPs, 128)
static void SUB_PPs(struct PPC_DFP *dfp)
{
dfp_set_FPRF_from_FRT(dfp);
dfp_check_for_OX(dfp);
dfp_check_for_UX(dfp);
dfp_check_for_XX(dfp);
dfp_check_for_VXSNAN(dfp);
dfp_check_for_VXISI_subtract(dfp);
}
DFP_HELPER_TAB(dsub, decNumberSubtract, SUB_PPs, 64)
DFP_HELPER_TAB(dsubq, decNumberSubtract, SUB_PPs, 128)

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@ -618,3 +618,5 @@ DEF_HELPER_3(store_601_batu, void, env, i32, tl)
DEF_HELPER_4(dadd, void, env, fprp, fprp, fprp) DEF_HELPER_4(dadd, void, env, fprp, fprp, fprp)
DEF_HELPER_4(daddq, void, env, fprp, fprp, fprp) DEF_HELPER_4(daddq, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dsub, void, env, fprp, fprp, fprp)
DEF_HELPER_4(dsubq, void, env, fprp, fprp, fprp)

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@ -8358,7 +8358,8 @@ static void gen_##name(DisasContext *ctx) \
GEN_DFP_T_A_B_Rc(dadd) GEN_DFP_T_A_B_Rc(dadd)
GEN_DFP_T_A_B_Rc(daddq) GEN_DFP_T_A_B_Rc(daddq)
GEN_DFP_T_A_B_Rc(dsub)
GEN_DFP_T_A_B_Rc(dsubq)
/*** SPE extension ***/ /*** SPE extension ***/
/* Register moves */ /* Register moves */
@ -11288,6 +11289,8 @@ _GEN_DFP_QUADx2(name, op1, op2, 0x00210000)
GEN_DFP_T_A_B_Rc(dadd, 0x02, 0x00), GEN_DFP_T_A_B_Rc(dadd, 0x02, 0x00),
GEN_DFP_Tp_Ap_Bp_Rc(daddq, 0x02, 0x00), GEN_DFP_Tp_Ap_Bp_Rc(daddq, 0x02, 0x00),
GEN_DFP_T_A_B_Rc(dsub, 0x02, 0x10),
GEN_DFP_Tp_Ap_Bp_Rc(dsubq, 0x02, 0x10),
#undef GEN_SPE #undef GEN_SPE
#define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \ #define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE) GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)