target/alpha: Use tcg_constant_i64 for zero and lit
These constant temps do not need to be freed, and therefore need less bookkeeping from tcg producers. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -66,8 +66,6 @@ struct DisasContext {
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/* Temporaries for $31 and $f31 as source and destination. */
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/* Temporaries for $31 and $f31 as source and destination. */
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TCGv zero;
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TCGv zero;
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TCGv sink;
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TCGv sink;
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/* Temporary for immediate constants. */
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TCGv lit;
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};
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};
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/* Target-specific return values from translate_one, indicating the
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/* Target-specific return values from translate_one, indicating the
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@ -157,7 +155,7 @@ void alpha_translate_init(void)
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static TCGv load_zero(DisasContext *ctx)
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static TCGv load_zero(DisasContext *ctx)
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{
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{
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if (!ctx->zero) {
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if (!ctx->zero) {
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ctx->zero = tcg_const_i64(0);
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ctx->zero = tcg_constant_i64(0);
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}
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}
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return ctx->zero;
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return ctx->zero;
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}
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}
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@ -177,14 +175,6 @@ static void free_context_temps(DisasContext *ctx)
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tcg_temp_free(ctx->sink);
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tcg_temp_free(ctx->sink);
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ctx->sink = NULL;
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ctx->sink = NULL;
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}
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}
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if (ctx->zero) {
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tcg_temp_free(ctx->zero);
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ctx->zero = NULL;
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}
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if (ctx->lit) {
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tcg_temp_free(ctx->lit);
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ctx->lit = NULL;
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}
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}
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}
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static TCGv load_gpr(DisasContext *ctx, unsigned reg)
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static TCGv load_gpr(DisasContext *ctx, unsigned reg)
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@ -200,8 +190,7 @@ static TCGv load_gpr_lit(DisasContext *ctx, unsigned reg,
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uint8_t lit, bool islit)
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uint8_t lit, bool islit)
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{
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{
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if (islit) {
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if (islit) {
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ctx->lit = tcg_const_i64(lit);
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return tcg_constant_i64(lit);
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return ctx->lit;
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} else if (likely(reg < 31)) {
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} else if (likely(reg < 31)) {
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return ctx->ir[reg];
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return ctx->ir[reg];
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} else {
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} else {
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@ -2992,7 +2981,6 @@ static void alpha_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
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ctx->zero = NULL;
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ctx->zero = NULL;
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ctx->sink = NULL;
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ctx->sink = NULL;
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ctx->lit = NULL;
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/* Bound the number of insns to execute to those left on the page. */
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/* Bound the number of insns to execute to those left on the page. */
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bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4;
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bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4;
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