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virtio,pc,acpi: fixes, tests 

Fixes and tests all over the place.
 Batch iommu updates for vdpa.
 Removal of deprecated cpu hotplug commands.
 SMBIOS OEM string support.
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio,pc,acpi: fixes, tests

Fixes and tests all over the place.
Batch iommu updates for vdpa.
Removal of deprecated cpu hotplug commands.
SMBIOS OEM string support.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Tue 29 Sep 2020 08:09:21 BST
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (48 commits)
  libvhost-user: return on error in vu_log_queue_fill()
  libvhost-user: return early on virtqueue errors
  hw: virtio-pmem: detach the element fromt the virtqueue when error occurs
  tests/acpi: update golden master DSDT binary table blobs for q35
  piix4: don't reserve hw resources when hotplug is off globally
  Add ACPI DSDT tables for q35 that are being updated by the next patch
  tests/acpi: add newly added acpi DSDT table blob for pci bridge hotplug flag
  tests/acpi: unit test for 'acpi-pci-hotplug-with-bridge-support' bridge flag
  tests/acpi: list added acpi table binary file for pci bridge hotplug test
  i440fx/acpi: do not add hotplug related amls for cold plugged bridges
  Fix a gap where acpi_pcihp_find_hotplug_bus() returns a non-hotpluggable bus
  tests/acpi: add a new ACPI table in order to test root pci hotplug on/off
  tests/acpi: add new unit test to test hotplug off/on feature on the root pci bus
  tests/acpi: mark addition of table DSDT.roothp for unit testing root pci hotplug
  vhost-user: save features of multiqueues if chardev is closed
  qemu-options: document SMBIOS type 11 settings
  hw/smbios: report error if table size is too large
  hw/smbios: support loading OEM strings values from a file
  tests: acpi: update acpi blobs with new AML
  x68: acpi: trigger SMI before sending hotplug Notify event to OSPM
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2020-09-29 11:10:29 +01:00
parent 23290e8070 8138405528
commit 213057383c
394 changed files with 72814 additions and 419 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Kconfig.host
View File

@ -24,6 +24,10 @@ config VHOST_USER
bool
select VHOST
config VHOST_VDPA
bool
select VHOST
config VHOST_KERNEL
bool
select VHOST

3
configure vendored
View File

@ -2494,9 +2494,10 @@ if test "$vhost_net_vdpa" = "yes" && test "$vhost_vdpa" = "no"; then
error_exit "--enable-vhost-net-vdpa requires --enable-vhost-vdpa"
fi
# OR the vhost-kernel and vhost-user values for simplicity
# OR the vhost-kernel, vhost-vdpa and vhost-user values for simplicity
if test "$vhost_net" = ""; then
test "$vhost_net_user" = "yes" && vhost_net=yes
test "$vhost_net_vdpa" = "yes" && vhost_net=yes
test "$vhost_kernel" = "yes" && vhost_net=yes
fi

26
contrib/libvhost-user/libvhost-user.c
View File

@ -2416,7 +2416,7 @@ vu_queue_set_notification(VuDev *dev, VuVirtq *vq, int enable)
}
}
static void
static bool
virtqueue_map_desc(VuDev *dev,
unsigned int *p_num_sg, struct iovec *iov,
unsigned int max_num_sg, bool is_write,
@ -2428,7 +2428,7 @@ virtqueue_map_desc(VuDev *dev,
if (!sz) {
vu_panic(dev, "virtio: zero sized buffers are not allowed");
return;
return false;
}
while (sz) {
@ -2436,13 +2436,13 @@ virtqueue_map_desc(VuDev *dev,
if (num_sg == max_num_sg) {
vu_panic(dev, "virtio: too many descriptors in indirect table");
return;
return false;
}
iov[num_sg].iov_base = vu_gpa_to_va(dev, &len, pa);
if (iov[num_sg].iov_base == NULL) {
vu_panic(dev, "virtio: invalid address for buffers");
return;
return false;
}
iov[num_sg].iov_len = len;
num_sg++;
@ -2451,6 +2451,7 @@ virtqueue_map_desc(VuDev *dev,
}
*p_num_sg = num_sg;
return true;
}
static void *
@ -2488,6 +2489,7 @@ vu_queue_map_desc(VuDev *dev, VuVirtq *vq, unsigned int idx, size_t sz)
if (lduw_le_p(&desc[i].flags) & VRING_DESC_F_INDIRECT) {
if (ldl_le_p(&desc[i].len) % sizeof(struct vring_desc)) {
vu_panic(dev, "Invalid size for indirect buffer table");
return NULL;
}
/* loop over the indirect descriptor table */
@ -2515,22 +2517,29 @@ vu_queue_map_desc(VuDev *dev, VuVirtq *vq, unsigned int idx, size_t sz)
/* Collect all the descriptors */
do {
if (lduw_le_p(&desc[i].flags) & VRING_DESC_F_WRITE) {
virtqueue_map_desc(dev, &in_num, iov + out_num,
if (!virtqueue_map_desc(dev, &in_num, iov + out_num,
VIRTQUEUE_MAX_SIZE - out_num, true,
ldq_le_p(&desc[i].addr), ldl_le_p(&desc[i].len));
ldq_le_p(&desc[i].addr),
ldl_le_p(&desc[i].len))) {
return NULL;
}
} else {
if (in_num) {
vu_panic(dev, "Incorrect order for descriptors");
return NULL;
}
virtqueue_map_desc(dev, &out_num, iov,
if (!virtqueue_map_desc(dev, &out_num, iov,
VIRTQUEUE_MAX_SIZE, false,
ldq_le_p(&desc[i].addr), ldl_le_p(&desc[i].len));
ldq_le_p(&desc[i].addr),
ldl_le_p(&desc[i].len))) {
return NULL;
}
}
/* If we've got too many, that implies a descriptor loop. */
if ((in_num + out_num) > max) {
vu_panic(dev, "Looped descriptor");
return NULL;
}
rc = virtqueue_read_next_desc(dev, desc, i, max, &i);
} while (rc == VIRTQUEUE_READ_DESC_MORE);
@ -2724,6 +2733,7 @@ vu_log_queue_fill(VuDev *dev, VuVirtq *vq,
if (lduw_le_p(&desc[i].flags) & VRING_DESC_F_INDIRECT) {
if (ldl_le_p(&desc[i].len) % sizeof(struct vring_desc)) {
vu_panic(dev, "Invalid size for indirect buffer table");
return;
}
/* loop over the indirect descriptor table */

25
docs/system/deprecated.rst
View File

@ -272,13 +272,6 @@ The ``query-cpus`` command is replaced by the ``query-cpus-fast`` command.
The ``arch`` output member of the ``query-cpus-fast`` command is
replaced by the ``target`` output member.
``cpu-add`` (since 4.0)
'''''''''''''''''''''''
Use ``device_add`` for hotplugging vCPUs instead of ``cpu-add``. See
documentation of ``query-hotpluggable-cpus`` for additional
details.
``query-events`` (since 4.0)
''''''''''''''''''''''''''''
@ -294,12 +287,6 @@ the 'wait' field, which is only applicable to sockets in server mode
Human Monitor Protocol (HMP) commands
-------------------------------------
``cpu-add`` (since 4.0)
'''''''''''''''''''''''
Use ``device_add`` for hotplugging vCPUs instead of ``cpu-add``. See
documentation of ``query-hotpluggable-cpus`` for additional details.
``acl_show``, ``acl_reset``, ``acl_policy``, ``acl_add``, ``acl_remove`` (since 4.0.0)
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
@ -517,6 +504,12 @@ QEMU Machine Protocol (QMP) commands
The "autoload" parameter has been ignored since 2.12.0. All bitmaps
are automatically loaded from qcow2 images.
``cpu-add`` (removed in 5.2)
''''''''''''''''''''''''''''
Use ``device_add`` for hotplugging vCPUs instead of ``cpu-add``. See
documentation of ``query-hotpluggable-cpus`` for additional details.
Human Monitor Protocol (HMP) commands
-------------------------------------
@ -526,6 +519,12 @@ The ``hub_id`` parameter of ``hostfwd_add`` / ``hostfwd_remove`` (removed in 5.0
The ``[hub_id name]`` parameter tuple of the 'hostfwd_add' and
'hostfwd_remove' HMP commands has been replaced by ``netdev_id``.
``cpu-add`` (removed in 5.2)
''''''''''''''''''''''''''''
Use ``device_add`` for hotplugging vCPUs instead of ``cpu-add``. See
documentation of ``query-hotpluggable-cpus`` for additional details.
Guest Emulator ISAs
-------------------

15
hmp-commands.hx
View File

@ -1761,21 +1761,6 @@ SRST
Executes a qemu-io command on the given block device.
ERST
{
.name = "cpu-add",
.args_type = "id:i",
.params = "id",
.help = "add cpu (deprecated, use device_add instead)",
.cmd = hmp_cpu_add,
},
SRST
``cpu-add`` *id*
Add CPU with id *id*. This command is deprecated, please
+use ``device_add`` instead. For details, refer to
'docs/cpu-hotplug.rst'.
ERST
{
.name = "qom-list",
.args_type = "path:s?",

16
hw/acpi/aml-build.c
View File

@ -556,6 +556,15 @@ Aml *aml_or(Aml *arg1, Aml *arg2, Aml *dst)
return build_opcode_2arg_dst(0x7D /* OrOp */, arg1, arg2, dst);
}
/* ACPI 1.0b: 16.2.5.4 Type 2 Opcodes Encoding: DefLAnd */
Aml *aml_land(Aml *arg1, Aml *arg2)
{
Aml *var = aml_opcode(0x90 /* LAndOp */);
aml_append(var, arg1);
aml_append(var, arg2);
return var;
}
/* ACPI 1.0b: 16.2.5.4 Type 2 Opcodes Encoding: DefLOr */
Aml *aml_lor(Aml *arg1, Aml *arg2)
{
@ -629,6 +638,13 @@ Aml *aml_notify(Aml *arg1, Aml *arg2)
return var;
}
/* ACPI 1.0b: 16.2.5.3 Type 1 Opcodes Encoding: DefBreak */
Aml *aml_break(void)
{
Aml *var = aml_opcode(0xa5 /* BreakOp */);
return var;
}
/* helper to call method without argument */
Aml *aml_call0(const char *method)
{

165
hw/acpi/cpu.c
View File

@ -14,6 +14,8 @@
#define ACPI_CPU_CMD_DATA_OFFSET_RW 8
#define ACPI_CPU_CMD_DATA2_OFFSET_R 0
#define OVMF_CPUHP_SMI_CMD 4
enum {
CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
CPHP_OST_EVENT_CMD = 1,
@ -321,6 +323,7 @@ const VMStateDescription vmstate_cpu_hotplug = {
#define CPU_NOTIFY_METHOD "CTFY"
#define CPU_EJECT_METHOD "CEJ0"
#define CPU_OST_METHOD "COST"
#define CPU_ADDED_LIST "CNEW"
#define CPU_ENABLED "CPEN"
#define CPU_SELECTOR "CSEL"
@ -465,42 +468,150 @@ void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
{
const uint8_t max_cpus_per_pass = 255;
Aml *else_ctx;
Aml *while_ctx;
Aml *while_ctx, *while_ctx2;
Aml *has_event = aml_local(0);
Aml *dev_chk = aml_int(1);
Aml *eject_req = aml_int(3);
Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
Aml *num_added_cpus = aml_local(1);
Aml *cpu_idx = aml_local(2);
Aml *uid = aml_local(3);
Aml *has_job = aml_local(4);
Aml *new_cpus = aml_name(CPU_ADDED_LIST);
aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
aml_append(method, aml_store(one, has_event));
while_ctx = aml_while(aml_equal(has_event, one));
/*
* Windows versions newer than XP (including Windows 10/Windows
* Server 2019), do support* VarPackageOp but, it is cripled to hold
* the same elements number as old PackageOp.
* For compatibility with Windows XP (so it won't crash) use ACPI1.0
* PackageOp which can hold max 255 elements.
*
* use named package as old Windows don't support it in local var
*/
aml_append(method, aml_name_decl(CPU_ADDED_LIST,
aml_package(max_cpus_per_pass)));
aml_append(method, aml_store(zero, uid));
aml_append(method, aml_store(one, has_job));
/*
* CPU_ADDED_LIST can hold limited number of elements, outer loop
* allows to process CPUs in batches which let us to handle more
* CPUs than CPU_ADDED_LIST can hold.
*/
while_ctx2 = aml_while(aml_equal(has_job, one));
{
/* clear loop exit condition, ins_evt/rm_evt checks
* will set it to 1 while next_cpu_cmd returns a CPU
* with events */
aml_append(while_ctx, aml_store(zero, has_event));
aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
ifctx = aml_if(aml_equal(ins_evt, one));
{
aml_append(ifctx,
aml_call2(CPU_NOTIFY_METHOD, cpu_data, dev_chk));
aml_append(ifctx, aml_store(one, ins_evt));
aml_append(ifctx, aml_store(one, has_event));
}
aml_append(while_ctx, ifctx);
else_ctx = aml_else();
ifctx = aml_if(aml_equal(rm_evt, one));
{
aml_append(ifctx,
aml_call2(CPU_NOTIFY_METHOD, cpu_data, eject_req));
aml_append(ifctx, aml_store(one, rm_evt));
aml_append(ifctx, aml_store(one, has_event));
}
aml_append(else_ctx, ifctx);
aml_append(while_ctx, else_ctx);
aml_append(while_ctx2, aml_store(zero, has_job));
aml_append(while_ctx2, aml_store(one, has_event));
aml_append(while_ctx2, aml_store(zero, num_added_cpus));
/*
* Scan CPUs, till there are CPUs with events or
* CPU_ADDED_LIST capacity is exhausted
*/
while_ctx = aml_while(aml_land(aml_equal(has_event, one),
aml_lless(uid, aml_int(arch_ids->len))));
{
/*
* clear loop exit condition, ins_evt/rm_evt checks will
* set it to 1 while next_cpu_cmd returns a CPU with events
*/
aml_append(while_ctx, aml_store(zero, has_event));
aml_append(while_ctx, aml_store(uid, cpu_selector));
aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
/*
* wrap around case, scan is complete, exit loop.
* It happens since events are not cleared in scan loop,
* so next_cpu_cmd continues to find already processed CPUs
*/
ifctx = aml_if(aml_lless(cpu_data, uid));
{
aml_append(ifctx, aml_break());
}
aml_append(while_ctx, ifctx);
/*
* if CPU_ADDED_LIST is full, exit inner loop and process
* collected CPUs
*/
ifctx = aml_if(
aml_equal(num_added_cpus, aml_int(max_cpus_per_pass)));
{
aml_append(ifctx, aml_store(one, has_job));
aml_append(ifctx, aml_break());
}
aml_append(while_ctx, ifctx);
aml_append(while_ctx, aml_store(cpu_data, uid));
ifctx = aml_if(aml_equal(ins_evt, one));
{
/* cache added CPUs to Notify/Wakeup later */
aml_append(ifctx, aml_store(uid,
aml_index(new_cpus, num_added_cpus)));
aml_append(ifctx, aml_increment(num_added_cpus));
aml_append(ifctx, aml_store(one, has_event));
}
aml_append(while_ctx, ifctx);
else_ctx = aml_else();
ifctx = aml_if(aml_equal(rm_evt, one));
{
aml_append(ifctx,
aml_call2(CPU_NOTIFY_METHOD, uid, eject_req));
aml_append(ifctx, aml_store(one, rm_evt));
aml_append(ifctx, aml_store(one, has_event));
}
aml_append(else_ctx, ifctx);
aml_append(while_ctx, else_ctx);
aml_append(while_ctx, aml_increment(uid));
}
aml_append(while_ctx2, while_ctx);
/*
* in case FW negotiated ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT,
* make upcall to FW, so it can pull in new CPUs before
* OS is notified and wakes them up
*/
if (opts.smi_path) {
ifctx = aml_if(aml_lgreater(num_added_cpus, zero));
{
aml_append(ifctx, aml_store(aml_int(OVMF_CPUHP_SMI_CMD),
aml_name("%s", opts.smi_path)));
}
aml_append(while_ctx2, ifctx);
}
/* Notify OSPM about new CPUs and clear insert events */
aml_append(while_ctx2, aml_store(zero, cpu_idx));
while_ctx = aml_while(aml_lless(cpu_idx, num_added_cpus));
{
aml_append(while_ctx,
aml_store(aml_derefof(aml_index(new_cpus, cpu_idx)),
uid));
aml_append(while_ctx,
aml_call2(CPU_NOTIFY_METHOD, uid, dev_chk));
aml_append(while_ctx, aml_store(uid, aml_debug()));
aml_append(while_ctx, aml_store(uid, cpu_selector));
aml_append(while_ctx, aml_store(one, ins_evt));
aml_append(while_ctx, aml_increment(cpu_idx));
}
aml_append(while_ctx2, while_ctx);
/*
* If another batch is needed, then it will resume scanning
* exactly at -- and not after -- the last CPU that's currently
* in CPU_ADDED_LIST. In other words, the last CPU in
* CPU_ADDED_LIST is going to be re-checked. That's OK: we've
* just cleared the insert event for *all* CPUs in
* CPU_ADDED_LIST, including the last one. So the scan will
* simply seek past it.
*/
}
aml_append(method, while_ctx);
aml_append(method, while_ctx2);
aml_append(method, aml_release(ctrl_lock));
}
aml_append(cpus_dev, method);

24
hw/acpi/ich9.c
View File

@ -408,10 +408,20 @@ void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) &&
!lpc->pm.acpi_memory_hotplug.is_enabled)
!lpc->pm.acpi_memory_hotplug.is_enabled) {
error_setg(errp,
"memory hotplug is not enabled: %s.memory-hotplug-support "
"is not set", object_get_typename(OBJECT(lpc)));
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
uint64_t negotiated = lpc->smi_negotiated_features;
if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
!(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT))) {
error_setg(errp, "cpu hotplug with SMI wasn't enabled by firmware");
error_append_hint(errp, "update machine type to newer than 5.1 "
"and firmware that suppors CPU hotplug with SMM");
}
}
}
void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
@ -450,6 +460,18 @@ void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
!lpc->pm.cpu_hotplug_legacy) {
uint64_t negotiated = lpc->smi_negotiated_features;
if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
!(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT))) {
error_setg(errp, "cpu hot-unplug with SMI wasn't enabled "
"by firmware");
error_append_hint(errp, "update machine type to a version having "
"x-smi-cpu-hotunplug=on and firmware that "
"supports CPU hot-unplug with SMM");
return;
}
acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
dev, errp);
} else {

15
hw/acpi/pcihp.c
View File

@ -147,6 +147,21 @@ static PCIBus *acpi_pcihp_find_hotplug_bus(AcpiPciHpState *s, int bsel)
if (!bsel && !find.bus) {
find.bus = s->root;
}
/*
* Check if find.bus is actually hotpluggable. If bsel is set to
* NULL for example on the root bus in order to make it
* non-hotpluggable, find.bus will match the root bus when bsel
* is 0. See acpi_pcihp_test_hotplug_bus() above. Since the
* bus is not hotpluggable however, we should not select the bus.
* Instead, we should set find.bus to NULL in that case. In the check
* below, we generalize this case for all buses, not just the root bus.
* The callers of this function check for a null return value and
* handle them appropriately.
*/
if (find.bus && !qbus_is_hotpluggable(BUS(find.bus))) {
find.bus = NULL;
}
return find.bus;
}

6
hw/acpi/piix4.c
View File

@ -596,8 +596,10 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,
"acpi-gpe0", GPE_LEN);
memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe);
acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent,
s->use_acpi_hotplug_bridge);
if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) {
acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent,
s->use_acpi_hotplug_bridge);
}
s->cpu_hotplug_legacy = true;
object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy",

19
hw/block/vhost-user-blk.c
View File

@ -150,6 +150,7 @@ static int vhost_user_blk_start(VirtIODevice *vdev)
error_report("Error starting vhost: %d", -ret);
goto err_guest_notifiers;
}
s->started_vu = true;
/* guest_notifier_mask/pending not used yet, so just unmask
* everything here. virtio-pci will do the right thing by
@ -175,6 +176,11 @@ static void vhost_user_blk_stop(VirtIODevice *vdev)
VirtioBusClass *k = VIRTIO_BUS_GET_CLASS(qbus);
int ret;
if (!s->started_vu) {
return;
}
s->started_vu = false;
if (!k->set_guest_notifiers) {
return;
}
@ -341,9 +347,7 @@ static void vhost_user_blk_disconnect(DeviceState *dev)
}
s->connected = false;
if (s->dev.started) {
vhost_user_blk_stop(vdev);
}
vhost_user_blk_stop(vdev);
vhost_dev_cleanup(&s->dev);
}
@ -399,6 +403,15 @@ static void vhost_user_blk_event(void *opaque, QEMUChrEvent event)
NULL, NULL, false);
aio_bh_schedule_oneshot(ctx, vhost_user_blk_chr_closed_bh, opaque);
}
/*
* Move vhost device to the stopped state. The vhost-user device
* will be clean up and disconnected in BH. This can be useful in
* the vhost migration code. If disconnect was caught there is an
* option for the general vhost code to get the dev state without
* knowing its type (in this case vhost-user).
*/
s->dev.started = false;
break;
case CHR_EVENT_BREAK:
case CHR_EVENT_MUX_IN:

12
hw/core/machine-hmp-cmds.c
View File

@ -46,18 +46,6 @@ void hmp_info_cpus(Monitor *mon, const QDict *qdict)
qapi_free_CpuInfoFastList(cpu_list);
}
void hmp_cpu_add(Monitor *mon, const QDict *qdict)
{
int cpuid;
Error *err = NULL;
error_report("cpu_add is deprecated, please use device_add instead");
cpuid = qdict_get_int(qdict, "id");
qmp_cpu_add(cpuid, &err);
hmp_handle_error(mon, err);
}
void hmp_hotpluggable_cpus(Monitor *mon, const QDict *qdict)
{
Error *err = NULL;

12
hw/core/machine-qmp-cmds.c
View File

@ -284,18 +284,6 @@ HotpluggableCPUList *qmp_query_hotpluggable_cpus(Error **errp)
return machine_query_hotpluggable_cpus(ms);
}
void qmp_cpu_add(int64_t id, Error **errp)
{
MachineClass *mc;
mc = MACHINE_GET_CLASS(current_machine);
if (mc->hot_add_cpu) {
mc->hot_add_cpu(current_machine, id, errp);
} else {
error_setg(errp, "Not supported");
}
}
void qmp_set_numa_node(NumaOptions *cmd, Error **errp)
{
if (!runstate_check(RUN_STATE_PRECONFIG)) {

1
hw/core/machine.c
View File

@ -44,6 +44,7 @@ GlobalProperty hw_compat_5_0[] = {
{ "vmport", "x-signal-unsupported-cmd", "off" },
{ "vmport", "x-report-vmx-type", "off" },
{ "vmport", "x-cmds-v2", "off" },
{ "virtio-device", "x-disable-legacy-check", "true" },
};
const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);

72
hw/i386/acpi-build.c
View File

@ -95,6 +95,8 @@ typedef struct AcpiPmInfo {
bool s3_disabled;
bool s4_disabled;
bool pcihp_bridge_en;
bool smi_on_cpuhp;
bool pcihp_root_en;
uint8_t s4_val;
AcpiFadtData fadt;
uint16_t cpu_hp_io_base;
@ -194,6 +196,7 @@ static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm)
pm->cpu_hp_io_base = 0;
pm->pcihp_io_base = 0;
pm->pcihp_io_len = 0;
pm->smi_on_cpuhp = false;
assert(obj);
init_common_fadt_data(machine, obj, &pm->fadt);
@ -207,12 +210,16 @@ static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm)
object_property_get_uint(obj, ACPI_PCIHP_IO_LEN_PROP, NULL);
}
if (lpc) {
uint64_t smi_features = object_property_get_uint(lpc,
ICH9_LPC_SMI_NEGOTIATED_FEAT_PROP, NULL);
struct AcpiGenericAddress r = { .space_id = AML_AS_SYSTEM_IO,
.bit_width = 8, .address = ICH9_RST_CNT_IOPORT };
pm->fadt.reset_reg = r;
pm->fadt.reset_val = 0xf;
pm->fadt.flags |= 1 << ACPI_FADT_F_RESET_REG_SUP;
pm->cpu_hp_io_base = ICH9_CPU_HOTPLUG_IO_BASE;
pm->smi_on_cpuhp =
!!(smi_features & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT));
}
/* The above need not be conditional on machine type because the reset port
@ -245,6 +252,9 @@ static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm)
pm->pcihp_bridge_en =
object_property_get_bool(obj, "acpi-pci-hotplug-with-bridge-support",
NULL);
pm->pcihp_root_en =
object_property_get_bool(obj, "acpi-root-pci-hotplug",
NULL);
}
static void acpi_get_misc_info(AcpiMiscInfo *info)
@ -359,6 +369,7 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
int slot = PCI_SLOT(i);
bool hotplug_enabled_dev;
bool bridge_in_acpi;
bool cold_plugged_bridge;
if (!pdev) {
if (bsel) { /* add hotplug slots for non present devices */
@ -380,15 +391,14 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
pc = PCI_DEVICE_GET_CLASS(pdev);
dc = DEVICE_GET_CLASS(pdev);
/* When hotplug for bridges is enabled, bridges are
* described in ACPI separately (see build_pci_bus_end).
* In this case they aren't themselves hot-pluggable.
/*
* Cold plugged bridges aren't themselves hot-pluggable.
* Hotplugged bridges *are* hot-pluggable.
*/
bridge_in_acpi = pc->is_bridge && pcihp_bridge_en &&
!DEVICE(pdev)->hotplugged;
cold_plugged_bridge = pc->is_bridge && !DEVICE(pdev)->hotplugged;
bridge_in_acpi = cold_plugged_bridge && pcihp_bridge_en;
hotplug_enabled_dev = bsel && dc->hotpluggable && !bridge_in_acpi;
hotplug_enabled_dev = bsel && dc->hotpluggable && !cold_plugged_bridge;
if (pc->class_id == PCI_CLASS_BRIDGE_ISA) {
continue;
@ -450,10 +460,12 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
}
/* Append PCNT method to notify about events on local and child buses.
* Add unconditionally for root since DSDT expects it.
* Add this method for root bus only when hotplug is enabled since DSDT
* expects it.
*/
method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
if (bsel || pcihp_bridge_en) {
method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
}
/* If bus supports hotplug select it and notify about local events */
if (bsel) {
uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
@ -479,7 +491,10 @@ static void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus,
aml_append(method, aml_name("^S%.02X.PCNT", devfn));
}
}
aml_append(parent_scope, method);
if (bsel || pcihp_bridge_en) {
aml_append(parent_scope, method);
}
qobject_unref(bsel);
}
@ -1504,7 +1519,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
build_hpet_aml(dsdt);
build_piix4_isa_bridge(dsdt);
build_isa_devices_aml(dsdt);
build_piix4_pci_hotplug(dsdt);
if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
build_piix4_pci_hotplug(dsdt);
}
build_piix4_pci0_int(dsdt);
} else {
sb_scope = aml_scope("_SB");
@ -1515,6 +1532,32 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_UID", aml_int(0)));
aml_append(dev, build_q35_osc_method());
aml_append(sb_scope, dev);
if (pm->smi_on_cpuhp) {
/* reserve SMI block resources, IO ports 0xB2, 0xB3 */
dev = aml_device("PCI0.SMI0");
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
aml_append(dev, aml_name_decl("_UID", aml_string("SMI resources")));
crs = aml_resource_template();
aml_append(crs,
aml_io(
AML_DECODE16,
ACPI_PORT_SMI_CMD,
ACPI_PORT_SMI_CMD,
1,
2)
);
aml_append(dev, aml_name_decl("_CRS", crs));
aml_append(dev, aml_operation_region("SMIR", AML_SYSTEM_IO,
aml_int(ACPI_PORT_SMI_CMD), 2));
field = aml_field("SMIR", AML_BYTE_ACC, AML_NOLOCK,
AML_WRITE_AS_ZEROS);
aml_append(field, aml_named_field("SMIC", 8));
aml_append(field, aml_reserved_field(8));
aml_append(dev, field);
aml_append(sb_scope, dev);
}
aml_append(dsdt, sb_scope);
build_hpet_aml(dsdt);
@ -1530,7 +1573,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
build_legacy_cpu_hotplug_aml(dsdt, machine, pm->cpu_hp_io_base);
} else {
CPUHotplugFeatures opts = {
.acpi_1_compatible = true, .has_legacy_cphp = true
.acpi_1_compatible = true, .has_legacy_cphp = true,
.smi_path = pm->smi_on_cpuhp ? "\\_SB.PCI0.SMI0.SMIC" : NULL,
};
build_cpus_aml(dsdt, machine, opts, pm->cpu_hp_io_base,
"\\_SB.PCI0", "\\_GPE._E02");
@ -1546,7 +1590,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
{
aml_append(scope, aml_name_decl("_HID", aml_string("ACPI0006")));
if (misc->is_piix4) {
if (misc->is_piix4 && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
method = aml_method("_E01", 0, AML_NOTSERIALIZED);
aml_append(method,
aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF));
@ -1698,7 +1742,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
crs_range_set_free(&crs_range_set);
/* reserve PCIHP resources */
if (pm->pcihp_io_len) {
if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
dev = aml_device("PHPR");
aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
aml_append(dev,

31
hw/i386/pc.c
View File

@ -97,7 +97,9 @@
#include "trace.h"
#include CONFIG_DEVICES
GlobalProperty pc_compat_5_1[] = {};
GlobalProperty pc_compat_5_1[] = {
{ "ICH9-LPC", "x-smi-cpu-hotplug", "off" },
};
const size_t pc_compat_5_1_len = G_N_ELEMENTS(pc_compat_5_1);
GlobalProperty pc_compat_5_0[] = {
@ -769,32 +771,6 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts)
}
}
void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp)
{
X86MachineState *x86ms = X86_MACHINE(ms);
int64_t apic_id = x86_cpu_apic_id_from_index(x86ms, id);
Error *local_err = NULL;
if (id < 0) {
error_setg(errp, "Invalid CPU id: %" PRIi64, id);
return;
}
if (apic_id >= ACPI_CPU_HOTPLUG_ID_LIMIT) {
error_setg(errp, "Unable to add CPU: %" PRIi64
", resulting APIC ID (%" PRIi64 ") is too large",
id, apic_id);
return;
}
x86_cpu_new(X86_MACHINE(ms), apic_id, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
}
static
void pc_machine_done(Notifier *notifier, void *data)
{
@ -1691,7 +1667,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
mc->auto_enable_numa_with_memdev = true;
mc->has_hotpluggable_cpus = true;
mc->default_boot_order = "cad";
mc->hot_add_cpu = pc_hot_add_cpu;
mc->smp_parse = pc_smp_parse;
mc->block_default_type = IF_IDE;
mc->max_cpus = 255;

1
hw/i386/pc_piix.c
View File

@ -752,7 +752,6 @@ static void pc_i440fx_1_4_machine_options(MachineClass *m)
{
pc_i440fx_1_5_machine_options(m);
m->hw_version = "1.4.0";
m->hot_add_cpu = NULL;
compat_props_add(m->compat_props, pc_compat_1_4, pc_compat_1_4_len);
}

2
hw/i386/pc_q35.c
View File

@ -382,7 +382,7 @@ static void pc_q35_5_0_machine_options(MachineClass *m)
m->numa_mem_supported = true;
compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
m->auto_enable_numa_with_memhp = false;
m->auto_enable_numa_with_memdev = false;
}
DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL,

11
hw/i386/x86.c
View File

@ -279,6 +279,17 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
return;
}
if (x86ms->acpi_dev) {
Error *local_err = NULL;
hotplug_handler_pre_plug(HOTPLUG_HANDLER(x86ms->acpi_dev), dev,
&local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
}
init_topo_info(&topo_info, x86ms);
env->nr_dies = x86ms->smp_dies;

16
hw/isa/lpc_ich9.c
View File

@ -373,6 +373,15 @@ static void smi_features_ok_callback(void *opaque)
/* guest requests invalid features, leave @features_ok at zero */
return;
}
if (!(guest_features & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT)) &&
guest_features & (BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT) |
BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT))) {
/*
* cpu hot-[un]plug with SMI requires SMI broadcast,
* leave @features_ok at zero
*/
return;
}
/* valid feature subset requested, lock it down, report success */
lpc->smi_negotiated_features = guest_features;
@ -638,6 +647,9 @@ static void ich9_lpc_initfn(Object *obj)
&acpi_enable_cmd, OBJ_PROP_FLAG_READ);
object_property_add_uint8_ptr(OBJECT(lpc), ACPI_PM_PROP_ACPI_DISABLE_CMD,
&acpi_disable_cmd, OBJ_PROP_FLAG_READ);
object_property_add_uint64_ptr(obj, ICH9_LPC_SMI_NEGOTIATED_FEAT_PROP,
&lpc->smi_negotiated_features,
OBJ_PROP_FLAG_READ);
ich9_pm_add_properties(obj, &lpc->pm);
}
@ -747,6 +759,10 @@ static Property ich9_lpc_properties[] = {
DEFINE_PROP_BOOL("noreboot", ICH9LPCState, pin_strap.spkr_hi, true),
DEFINE_PROP_BIT64("x-smi-broadcast", ICH9LPCState, smi_host_features,
ICH9_LPC_SMI_F_BROADCAST_BIT, true),
DEFINE_PROP_BIT64("x-smi-cpu-hotplug", ICH9LPCState, smi_host_features,
ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT, true),
DEFINE_PROP_BIT64("x-smi-cpu-hotunplug", ICH9LPCState, smi_host_features,
ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT, false),
DEFINE_PROP_END_OF_LIST(),
};

12
hw/s390x/s390-virtio-ccw.c
View File

@ -553,17 +553,6 @@ static HotplugHandler *s390_get_hotplug_handler(MachineState *machine,
return NULL;
}
static void s390_hot_add_cpu(MachineState *machine,
const int64_t id, Error **errp)
{
ObjectClass *oc;
g_assert(machine->possible_cpus->cpus[0].cpu);
oc = OBJECT_CLASS(CPU_GET_CLASS(machine->possible_cpus->cpus[0].cpu));
s390x_new_cpu(object_class_get_name(oc), id, errp);
}
static void s390_nmi(NMIState *n, int cpu_index, Error **errp)
{
CPUState *cs = qemu_get_cpu(cpu_index);
@ -604,7 +593,6 @@ static void ccw_machine_class_init(ObjectClass *oc, void *data)
s390mc->hpage_1m_allowed = true;
mc->init = ccw_init;
mc->reset = s390_machine_reset;
mc->hot_add_cpu = s390_hot_add_cpu;
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
mc->no_floppy = 1;

12
hw/s390x/vhost-vsock-ccw.c
View File

@ -40,9 +40,21 @@ static void vhost_vsock_ccw_class_init(ObjectClass *klass, void *data)
static void vhost_vsock_ccw_instance_init(Object *obj)
{
VHostVSockCCWState *dev = VHOST_VSOCK_CCW(obj);
VirtioCcwDevice *ccw_dev = VIRTIO_CCW_DEVICE(obj);
VirtIODevice *virtio_dev;
virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
TYPE_VHOST_VSOCK);
virtio_dev = VIRTIO_DEVICE(&dev->vdev);
/*
* To avoid migration issues, we force virtio version 1 only when
* legacy check is enabled in the new machine types (>= 5.1).
*/
if (!virtio_legacy_check_disabled(virtio_dev)) {
ccw_dev->force_revision_1 = true;
}
}
static const TypeInfo vhost_vsock_ccw_info = {

15
hw/s390x/virtio-ccw.c
View File

@ -1122,9 +1122,18 @@ static void virtio_ccw_device_plugged(DeviceState *d, Error **errp)
}
if (!virtio_ccw_rev_max(dev) && !virtio_legacy_allowed(vdev)) {
error_setg(errp, "Invalid value of property max_rev "
"(is %d expected >= 1)", virtio_ccw_rev_max(dev));
return;
/*
* To avoid migration issues, we allow legacy mode when legacy
* check is disabled in the old machine types (< 5.1).
*/
if (virtio_legacy_check_disabled(vdev)) {
warn_report("device requires revision >= 1, but for backward "
"compatibility max_revision=0 is allowed");
} else {
error_setg(errp, "Invalid value of property max_rev "
"(is %d expected >= 1)", virtio_ccw_rev_max(dev));
return;
}
}
if (virtio_get_num_queues(vdev) > VIRTIO_QUEUE_MAX) {

85
hw/smbios/smbios.c
View File

@ -110,7 +110,7 @@ static struct {
static struct {
size_t nvalues;
const char **values;
char **values;
} type11;
static struct {
@ -314,6 +314,11 @@ static const QemuOptDesc qemu_smbios_type11_opts[] = {
.type = QEMU_OPT_STRING,
.help = "OEM string data",
},
{
.name = "path",
.type = QEMU_OPT_STRING,
.help = "OEM string data from file",
},
};
static const QemuOptDesc qemu_smbios_type17_opts[] = {
@ -360,6 +365,13 @@ static void smbios_register_config(void)
opts_init(smbios_register_config);
/*
* The SMBIOS 2.1 "structure table length" field in the
* entry point uses a 16-bit integer, so we're limited
* in total table size
*/
#define SMBIOS_21_MAX_TABLES_LEN 0xffff
static void smbios_validate_table(MachineState *ms)
{
uint32_t expect_t4_count = smbios_legacy ?
@ -370,6 +382,13 @@ static void smbios_validate_table(MachineState *ms)
expect_t4_count, smbios_type4_count);
exit(1);
}
if (smbios_ep_type == SMBIOS_ENTRY_POINT_21 &&
smbios_tables_len > SMBIOS_21_MAX_TABLES_LEN) {
error_report("SMBIOS 2.1 table length %zu exceeds %d",
smbios_tables_len, SMBIOS_21_MAX_TABLES_LEN);
exit(1);
}
}
@ -641,6 +660,8 @@ static void smbios_build_type_11_table(void)
for (i = 0; i < type11.nvalues; i++) {
SMBIOS_TABLE_SET_STR_LIST(11, type11.values[i]);
g_free(type11.values[i]);
type11.values[i] = NULL;
}
SMBIOS_BUILD_TABLE_POST;
@ -940,9 +961,8 @@ static void save_opt(const char **dest, QemuOpts *opts, const char *name)
struct opt_list {
const char *name;
size_t *ndest;
const char ***dest;
char ***dest;
};
static int save_opt_one(void *opaque,
@ -951,23 +971,60 @@ static int save_opt_one(void *opaque,
{
struct opt_list *opt = opaque;
if (!g_str_equal(name, opt->name)) {
return 0;
if (g_str_equal(name, "path")) {
g_autoptr(GByteArray) data = g_byte_array_new();
g_autofree char *buf = g_new(char, 4096);
ssize_t ret;
int fd = qemu_open(value, O_RDONLY, errp);
if (fd < 0) {
return -1;
}
while (1) {
ret = read(fd, buf, 4096);
if (ret == 0) {
break;
}
if (ret < 0) {
error_setg(errp, "Unable to read from %s: %s",
value, strerror(errno));
return -1;
}
if (memchr(buf, '\0', ret)) {
error_setg(errp, "NUL in OEM strings value in %s", value);
return -1;
}
g_byte_array_append(data, (guint8 *)buf, ret);
}
close(fd);
*opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1);
(*opt->dest)[*opt->ndest] = (char *)g_byte_array_free(data, FALSE);
(*opt->ndest)++;
data = NULL;
} else if (g_str_equal(name, "value")) {
*opt->dest = g_renew(char *, *opt->dest, (*opt->ndest) + 1);
(*opt->dest)[*opt->ndest] = g_strdup(value);
(*opt->ndest)++;
} else if (!g_str_equal(name, "type")) {
error_setg(errp, "Unexpected option %s", name);
return -1;
}
*opt->dest = g_renew(const char *, *opt->dest, (*opt->ndest) + 1);
(*opt->dest)[*opt->ndest] = value;
(*opt->ndest)++;
return 0;
}
static void save_opt_list(size_t *ndest, const char ***dest,
QemuOpts *opts, const char *name)
static bool save_opt_list(size_t *ndest, char ***dest, QemuOpts *opts,
Error **errp)
{
struct opt_list opt = {
name, ndest, dest,
ndest, dest,
};
qemu_opt_foreach(opts, save_opt_one, &opt, NULL);
if (!qemu_opt_foreach(opts, save_opt_one, &opt, errp)) {
return false;
}
return true;
}
void smbios_entry_add(QemuOpts *opts, Error **errp)
@ -1149,7 +1206,9 @@ void smbios_entry_add(QemuOpts *opts, Error **errp)
if (!qemu_opts_validate(opts, qemu_smbios_type11_opts, errp)) {
return;
}
save_opt_list(&type11.nvalues, &type11.values, opts, "value");
if (!save_opt_list(&type11.nvalues, &type11.values, opts, errp)) {
return;
}
return;
case 17:
if (!qemu_opts_validate(opts, qemu_smbios_type17_opts, errp)) {

31
hw/virtio/trace-events
View File

@ -22,6 +22,37 @@ vhost_user_postcopy_waker(const char *rb, uint64_t rb_offset) "%s + 0x%"PRIx64
vhost_user_postcopy_waker_found(uint64_t client_addr) "0x%"PRIx64
vhost_user_postcopy_waker_nomatch(const char *rb, uint64_t rb_offset) "%s + 0x%"PRIx64
# vhost-vdpa.c
vhost_vdpa_dma_map(void *vdpa, int fd, uint32_t msg_type, uint64_t iova, uint64_t size, uint64_t uaddr, uint8_t perm, uint8_t type) "vdpa:%p fd: %d msg_type: %"PRIu32" iova: 0x%"PRIx64" size: 0x%"PRIx64" uaddr: 0x%"PRIx64" perm: 0x%"PRIx8" type: %"PRIu8
vhost_vdpa_dma_unmap(void *vdpa, int fd, uint32_t msg_type, uint64_t iova, uint64_t size, uint8_t type) "vdpa:%p fd: %d msg_type: %"PRIu32" iova: 0x%"PRIx64" size: 0x%"PRIx64" type: %"PRIu8
vhost_vdpa_listener_region_add(void *vdpa, uint64_t iova, uint64_t llend, void *vaddr, bool readonly) "vdpa: %p iova 0x%"PRIx64" llend 0x%"PRIx64" vaddr: %p read-only: %d"
vhost_vdpa_listener_region_del(void *vdpa, uint64_t iova, uint64_t llend) "vdpa: %p iova 0x%"PRIx64" llend 0x%"PRIx64
vhost_vdpa_add_status(void *dev, uint8_t status) "dev: %p status: 0x%"PRIx8
vhost_vdpa_init(void *dev, void *vdpa) "dev: %p vdpa: %p"
vhost_vdpa_cleanup(void *dev, void *vdpa) "dev: %p vdpa: %p"
vhost_vdpa_memslots_limit(void *dev, int ret) "dev: %p = 0x%x"
vhost_vdpa_set_mem_table(void *dev, uint32_t nregions, uint32_t padding) "dev: %p nregions: %"PRIu32" padding: 0x%"PRIx32
vhost_vdpa_dump_regions(void *dev, int i, uint64_t guest_phys_addr, uint64_t memory_size, uint64_t userspace_addr, uint64_t flags_padding) "dev: %p %d: guest_phys_addr: 0x%"PRIx64" memory_size: 0x%"PRIx64" userspace_addr: 0x%"PRIx64" flags_padding: 0x%"PRIx64
vhost_vdpa_set_features(void *dev, uint64_t features) "dev: %p features: 0x%"PRIx64
vhost_vdpa_get_device_id(void *dev, uint32_t device_id) "dev: %p device_id %"PRIu32
vhost_vdpa_reset_device(void *dev, uint8_t status) "dev: %p status: 0x%"PRIx8
vhost_vdpa_get_vq_index(void *dev, int idx, int vq_idx) "dev: %p idx: %d vq idx: %d"
vhost_vdpa_set_vring_ready(void *dev) "dev: %p"
vhost_vdpa_dump_config(void *dev, const char *line) "dev: %p %s"
vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, uint32_t flags) "dev: %p offset: %"PRIu32" size: %"PRIu32" flags: 0x%"PRIx32
vhost_vdpa_get_config(void *dev, void *config, uint32_t config_len) "dev: %p config: %p config_len: %"PRIu32
vhost_vdpa_dev_start(void *dev, bool started) "dev: %p started: %d"
vhost_vdpa_set_log_base(void *dev, uint64_t base, unsigned long long size, int refcnt, int fd, void *log) "dev: %p base: 0x%"PRIx64" size: %llu refcnt: %d fd: %d log: %p"
vhost_vdpa_set_vring_addr(void *dev, unsigned int index, unsigned int flags, uint64_t desc_user_addr, uint64_t used_user_addr, uint64_t avail_user_addr, uint64_t log_guest_addr) "dev: %p index: %u flags: 0x%x desc_user_addr: 0x%"PRIx64" used_user_addr: 0x%"PRIx64" avail_user_addr: 0x%"PRIx64" log_guest_addr: 0x%"PRIx64
vhost_vdpa_set_vring_num(void *dev, unsigned int index, unsigned int num) "dev: %p index: %u num: %u"
vhost_vdpa_set_vring_base(void *dev, unsigned int index, unsigned int num) "dev: %p index: %u num: %u"
vhost_vdpa_get_vring_base(void *dev, unsigned int index, unsigned int num) "dev: %p index: %u num: %u"
vhost_vdpa_set_vring_kick(void *dev, unsigned int index, int fd) "dev: %p index: %u fd: %d"
vhost_vdpa_set_vring_call(void *dev, unsigned int index, int fd) "dev: %p index: %u fd: %d"
vhost_vdpa_get_features(void *dev, uint64_t features) "dev: %p features: 0x%"PRIx64
vhost_vdpa_set_owner(void *dev) "dev: %p"
vhost_vdpa_vq_get_addr(void *dev, void *vq, uint64_t desc_user_addr, uint64_t avail_user_addr, uint64_t used_user_addr) "dev: %p vq: %p desc_user_addr: 0x%"PRIx64" avail_user_addr: 0x%"PRIx64" used_user_addr: 0x%"PRIx64
# virtio.c
virtqueue_alloc_element(void *elem, size_t sz, unsigned in_num, unsigned out_num) "elem %p size %zd in_num %u out_num %u"
virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"

88
hw/virtio/vhost-backend.c
View File

@ -156,6 +156,28 @@ static int vhost_kernel_set_features(struct vhost_dev *dev,
return vhost_kernel_call(dev, VHOST_SET_FEATURES, &features);
}
static int vhost_kernel_set_backend_cap(struct vhost_dev *dev)
{
uint64_t features;
uint64_t f = 0x1ULL << VHOST_BACKEND_F_IOTLB_MSG_V2;
int r;
if (vhost_kernel_call(dev, VHOST_GET_BACKEND_FEATURES, &features)) {
return 0;
}
features &= f;
r = vhost_kernel_call(dev, VHOST_SET_BACKEND_FEATURES,
&features);
if (r) {
return 0;
}
dev->backend_cap = features;
return 0;
}
static int vhost_kernel_get_features(struct vhost_dev *dev,
uint64_t *features)
{
@ -195,34 +217,65 @@ static int vhost_kernel_vsock_set_running(struct vhost_dev *dev, int start)
static void vhost_kernel_iotlb_read(void *opaque)
{
struct vhost_dev *dev = opaque;
struct vhost_msg msg;
ssize_t len;
while ((len = read((uintptr_t)dev->opaque, &msg, sizeof msg)) > 0) {
if (len < sizeof msg) {
error_report("Wrong vhost message len: %d", (int)len);
break;
}
if (msg.type != VHOST_IOTLB_MSG) {
error_report("Unknown vhost iotlb message type");
break;
}
if (dev->backend_cap &
(0x1ULL << VHOST_BACKEND_F_IOTLB_MSG_V2)) {
struct vhost_msg_v2 msg;
vhost_backend_handle_iotlb_msg(dev, &msg.iotlb);
while ((len = read((uintptr_t)dev->opaque, &msg, sizeof msg)) > 0) {
if (len < sizeof msg) {
error_report("Wrong vhost message len: %d", (int)len);
break;
}
if (msg.type != VHOST_IOTLB_MSG_V2) {
error_report("Unknown vhost iotlb message type");
break;
}
vhost_backend_handle_iotlb_msg(dev, &msg.iotlb);
}
} else {
struct vhost_msg msg;
while ((len = read((uintptr_t)dev->opaque, &msg, sizeof msg)) > 0) {
if (len < sizeof msg) {
error_report("Wrong vhost message len: %d", (int)len);
break;
}
if (msg.type != VHOST_IOTLB_MSG) {
error_report("Unknown vhost iotlb message type");
break;
}
vhost_backend_handle_iotlb_msg(dev, &msg.iotlb);
}
}
}
static int vhost_kernel_send_device_iotlb_msg(struct vhost_dev *dev,
struct vhost_iotlb_msg *imsg)
{
struct vhost_msg msg;
if (dev->backend_cap & (1ULL << VHOST_BACKEND_F_IOTLB_MSG_V2)) {
struct vhost_msg_v2 msg;
msg.type = VHOST_IOTLB_MSG;
msg.iotlb = *imsg;
msg.type = VHOST_IOTLB_MSG_V2;
msg.iotlb = *imsg;
if (write((uintptr_t)dev->opaque, &msg, sizeof msg) != sizeof msg) {
error_report("Fail to update device iotlb");
return -EFAULT;
if (write((uintptr_t)dev->opaque, &msg, sizeof msg) != sizeof msg) {
error_report("Fail to update device iotlb");
return -EFAULT;
}
} else {
struct vhost_msg msg;
msg.type = VHOST_IOTLB_MSG;
msg.iotlb = *imsg;
if (write((uintptr_t)dev->opaque, &msg, sizeof msg) != sizeof msg) {
error_report("Fail to update device iotlb");
return -EFAULT;
}
}
return 0;
@ -260,6 +313,7 @@ static const VhostOps kernel_ops = {
vhost_kernel_set_vring_busyloop_timeout,
.vhost_set_features = vhost_kernel_set_features,
.vhost_get_features = vhost_kernel_get_features,
.vhost_set_backend_cap = vhost_kernel_set_backend_cap,
.vhost_set_owner = vhost_kernel_set_owner,
.vhost_reset_device = vhost_kernel_reset_device,
.vhost_get_vq_index = vhost_kernel_get_vq_index,

4
hw/virtio/vhost-user-vsock-pci.c
View File

@ -41,6 +41,9 @@ static void vhost_user_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
VHostUserVSockPCI *dev = VHOST_USER_VSOCK_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
/* unlike vhost-vsock, we do not need to care about pre-5.1 compat */
virtio_pci_force_virtio_1(vpci_dev);
qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
}
@ -69,7 +72,6 @@ static void vhost_user_vsock_pci_instance_init(Object *obj)
static const VirtioPCIDeviceTypeInfo vhost_user_vsock_pci_info = {
.base_name = TYPE_VHOST_USER_VSOCK_PCI,
.generic_name = "vhost-user-vsock-pci",
.transitional_name = "vhost-user-vsock-pci-transitional",
.non_transitional_name = "vhost-user-vsock-pci-non-transitional",
.instance_size = sizeof(VHostUserVSockPCI),
.instance_init = vhost_user_vsock_pci_instance_init,

158
hw/virtio/vhost-vdpa.c
View File

@ -20,6 +20,8 @@
#include "hw/virtio/vhost-vdpa.h"
#include "qemu/main-loop.h"
#include "cpu.h"
#include "trace.h"
#include "qemu-common.h"
static bool vhost_vdpa_listener_skipped_section(MemoryRegionSection *section)
{
@ -48,6 +50,9 @@ static int vhost_vdpa_dma_map(struct vhost_vdpa *v, hwaddr iova, hwaddr size,
msg.iotlb.perm = readonly ? VHOST_ACCESS_RO : VHOST_ACCESS_RW;
msg.iotlb.type = VHOST_IOTLB_UPDATE;
trace_vhost_vdpa_dma_map(v, fd, msg.type, msg.iotlb.iova, msg.iotlb.size,
msg.iotlb.uaddr, msg.iotlb.perm, msg.iotlb.type);
if (write(fd, &msg, sizeof(msg)) != sizeof(msg)) {
error_report("failed to write, fd=%d, errno=%d (%s)",
fd, errno, strerror(errno));
@ -69,6 +74,9 @@ static int vhost_vdpa_dma_unmap(struct vhost_vdpa *v, hwaddr iova,
msg.iotlb.size = size;
msg.iotlb.type = VHOST_IOTLB_INVALIDATE;
trace_vhost_vdpa_dma_unmap(v, fd, msg.type, msg.iotlb.iova,
msg.iotlb.size, msg.iotlb.type);
if (write(fd, &msg, sizeof(msg)) != sizeof(msg)) {
error_report("failed to write, fd=%d, errno=%d (%s)",
fd, errno, strerror(errno));
@ -78,6 +86,46 @@ static int vhost_vdpa_dma_unmap(struct vhost_vdpa *v, hwaddr iova,
return ret;
}
static void vhost_vdpa_listener_begin(MemoryListener *listener)
{
struct vhost_vdpa *v = container_of(listener, struct vhost_vdpa, listener);
struct vhost_dev *dev = v->dev;
struct vhost_msg_v2 msg;
int fd = v->device_fd;
if (!(dev->backend_cap & (0x1ULL << VHOST_BACKEND_F_IOTLB_BATCH))) {
return;
}
msg.type = v->msg_type;
msg.iotlb.type = VHOST_IOTLB_BATCH_BEGIN;
if (write(fd, &msg, sizeof(msg)) != sizeof(msg)) {
error_report("failed to write, fd=%d, errno=%d (%s)",
fd, errno, strerror(errno));
}
}
static void vhost_vdpa_listener_commit(MemoryListener *listener)
{
struct vhost_vdpa *v = container_of(listener, struct vhost_vdpa, listener);
struct vhost_dev *dev = v->dev;
struct vhost_msg_v2 msg;
int fd = v->device_fd;
if (!(dev->backend_cap & (0x1ULL << VHOST_BACKEND_F_IOTLB_BATCH))) {
return;
}
msg.type = v->msg_type;
msg.iotlb.type = VHOST_IOTLB_BATCH_END;
if (write(fd, &msg, sizeof(msg)) != sizeof(msg)) {
error_report("failed to write, fd=%d, errno=%d (%s)",
fd, errno, strerror(errno));
}
}
static void vhost_vdpa_listener_region_add(MemoryListener *listener,
MemoryRegionSection *section)
{
@ -114,6 +162,9 @@ static void vhost_vdpa_listener_region_add(MemoryListener *listener,
section->offset_within_region +
(iova - section->offset_within_address_space);
trace_vhost_vdpa_listener_region_add(v, iova, int128_get64(llend),
vaddr, section->readonly);
llsize = int128_sub(llend, int128_make64(iova));
ret = vhost_vdpa_dma_map(v, iova, int128_get64(llsize),
@ -169,6 +220,8 @@ static void vhost_vdpa_listener_region_del(MemoryListener *listener,
llend = int128_add(llend, section->size);
llend = int128_and(llend, int128_exts64(TARGET_PAGE_MASK));
trace_vhost_vdpa_listener_region_del(v, iova, int128_get64(llend));
if (int128_ge(int128_make64(iova), llend)) {
return;
}
@ -188,6 +241,8 @@ static void vhost_vdpa_listener_region_del(MemoryListener *listener,
* depends on the addnop().
*/
static const MemoryListener vhost_vdpa_memory_listener = {
.begin = vhost_vdpa_listener_begin,
.commit = vhost_vdpa_listener_commit,
.region_add = vhost_vdpa_listener_region_add,
.region_del = vhost_vdpa_listener_region_del,
};
@ -207,6 +262,7 @@ static void vhost_vdpa_add_status(struct vhost_dev *dev, uint8_t status)
{
uint8_t s;
trace_vhost_vdpa_add_status(dev, status);
if (vhost_vdpa_call(dev, VHOST_VDPA_GET_STATUS, &s)) {
return;
}
@ -221,8 +277,10 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque)
struct vhost_vdpa *v;
uint64_t features;
assert(dev->vhost_ops->backend_type == VHOST_BACKEND_TYPE_VDPA);
trace_vhost_vdpa_init(dev, opaque);
v = opaque;
v->dev = dev;
dev->opaque = opaque ;
vhost_vdpa_call(dev, VHOST_GET_FEATURES, &features);
dev->backend_features = features;
@ -240,6 +298,7 @@ static int vhost_vdpa_cleanup(struct vhost_dev *dev)
struct vhost_vdpa *v;
assert(dev->vhost_ops->backend_type == VHOST_BACKEND_TYPE_VDPA);
v = dev->opaque;
trace_vhost_vdpa_cleanup(dev, v);
memory_listener_unregister(&v->listener);
dev->opaque = NULL;
@ -248,13 +307,25 @@ static int vhost_vdpa_cleanup(struct vhost_dev *dev)
static int vhost_vdpa_memslots_limit(struct vhost_dev *dev)
{
trace_vhost_vdpa_memslots_limit(dev, INT_MAX);
return INT_MAX;
}
static int vhost_vdpa_set_mem_table(struct vhost_dev *dev,
struct vhost_memory *mem)
{
trace_vhost_vdpa_set_mem_table(dev, mem->nregions, mem->padding);
if (trace_event_get_state_backends(TRACE_VHOST_VDPA_SET_MEM_TABLE) &&
trace_event_get_state_backends(TRACE_VHOST_VDPA_DUMP_REGIONS)) {
int i;
for (i = 0; i < mem->nregions; i++) {
trace_vhost_vdpa_dump_regions(dev, i,
mem->regions[i].guest_phys_addr,
mem->regions[i].memory_size,
mem->regions[i].userspace_addr,
mem->regions[i].flags_padding);
}
}
if (mem->padding) {
return -1;
}
@ -266,6 +337,7 @@ static int vhost_vdpa_set_features(struct vhost_dev *dev,
uint64_t features)
{
int ret;
trace_vhost_vdpa_set_features(dev, features);
ret = vhost_vdpa_call(dev, VHOST_SET_FEATURES, &features);
uint8_t status = 0;
if (ret) {
@ -277,29 +349,59 @@ static int vhost_vdpa_set_features(struct vhost_dev *dev,
return !(status & VIRTIO_CONFIG_S_FEATURES_OK);
}
static int vhost_vdpa_set_backend_cap(struct vhost_dev *dev)
{
uint64_t features;
uint64_t f = 0x1ULL << VHOST_BACKEND_F_IOTLB_MSG_V2 |
0x1ULL << VHOST_BACKEND_F_IOTLB_BATCH;
int r;
if (vhost_vdpa_call(dev, VHOST_GET_BACKEND_FEATURES, &features)) {
return 0;
}
features &= f;
r = vhost_vdpa_call(dev, VHOST_SET_BACKEND_FEATURES, &features);
if (r) {
return 0;
}
dev->backend_cap = features;
return 0;
}
int vhost_vdpa_get_device_id(struct vhost_dev *dev,
uint32_t *device_id)
{
return vhost_vdpa_call(dev, VHOST_VDPA_GET_DEVICE_ID, device_id);
int ret;
ret = vhost_vdpa_call(dev, VHOST_VDPA_GET_DEVICE_ID, device_id);
trace_vhost_vdpa_get_device_id(dev, *device_id);
return ret;
}
static int vhost_vdpa_reset_device(struct vhost_dev *dev)
{
int ret;
uint8_t status = 0;
return vhost_vdpa_call(dev, VHOST_VDPA_SET_STATUS, &status);
ret = vhost_vdpa_call(dev, VHOST_VDPA_SET_STATUS, &status);
trace_vhost_vdpa_reset_device(dev, status);
return ret;
}
static int vhost_vdpa_get_vq_index(struct vhost_dev *dev, int idx)
{
assert(idx >= dev->vq_index && idx < dev->vq_index + dev->nvqs);
trace_vhost_vdpa_get_vq_index(dev, idx, idx - dev->vq_index);
return idx - dev->vq_index;
}
static int vhost_vdpa_set_vring_ready(struct vhost_dev *dev)
{
int i;
trace_vhost_vdpa_set_vring_ready(dev);
for (i = 0; i < dev->nvqs; ++i) {
struct vhost_vring_state state = {
.index = dev->vq_index + i,
@ -310,6 +412,19 @@ static int vhost_vdpa_set_vring_ready(struct vhost_dev *dev)
return 0;
}
static void vhost_vdpa_dump_config(struct vhost_dev *dev, const uint8_t *config,
uint32_t config_len)
{
int b, len;
char line[QEMU_HEXDUMP_LINE_LEN];
for (b = 0; b < config_len; b += 16) {
len = config_len - b;
qemu_hexdump_line(line, b, config, len, false);
trace_vhost_vdpa_dump_config(dev, line);
}
}
static int vhost_vdpa_set_config(struct vhost_dev *dev, const uint8_t *data,
uint32_t offset, uint32_t size,
uint32_t flags)
@ -318,10 +433,15 @@ static int vhost_vdpa_set_config(struct vhost_dev *dev, const uint8_t *data,
int ret;
unsigned long config_size = offsetof(struct vhost_vdpa_config, buf);
trace_vhost_vdpa_set_config(dev, offset, size, flags);
config = g_malloc(size + config_size);
config->off = offset;
config->len = size;
memcpy(config->buf, data, size);
if (trace_event_get_state_backends(TRACE_VHOST_VDPA_SET_CONFIG) &&
trace_event_get_state_backends(TRACE_VHOST_VDPA_DUMP_CONFIG)) {
vhost_vdpa_dump_config(dev, data, size);
}
ret = vhost_vdpa_call(dev, VHOST_VDPA_SET_CONFIG, config);
g_free(config);
return ret;
@ -334,18 +454,24 @@ static int vhost_vdpa_get_config(struct vhost_dev *dev, uint8_t *config,
unsigned long config_size = offsetof(struct vhost_vdpa_config, buf);
int ret;
trace_vhost_vdpa_get_config(dev, config, config_len);
v_config = g_malloc(config_len + config_size);
v_config->len = config_len;
v_config->off = 0;
ret = vhost_vdpa_call(dev, VHOST_VDPA_GET_CONFIG, v_config);
memcpy(config, v_config->buf, config_len);
g_free(v_config);
if (trace_event_get_state_backends(TRACE_VHOST_VDPA_GET_CONFIG) &&
trace_event_get_state_backends(TRACE_VHOST_VDPA_DUMP_CONFIG)) {
vhost_vdpa_dump_config(dev, config, config_len);
}
return ret;
}
static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started)
{
struct vhost_vdpa *v = dev->opaque;
trace_vhost_vdpa_dev_start(dev, started);
if (started) {
uint8_t status = 0;
memory_listener_register(&v->listener, &address_space_memory);
@ -367,53 +493,72 @@ static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started)
static int vhost_vdpa_set_log_base(struct vhost_dev *dev, uint64_t base,
struct vhost_log *log)
{
trace_vhost_vdpa_set_log_base(dev, base, log->size, log->refcnt, log->fd,
log->log);
return vhost_vdpa_call(dev, VHOST_SET_LOG_BASE, &base);
}
static int vhost_vdpa_set_vring_addr(struct vhost_dev *dev,
struct vhost_vring_addr *addr)
{
trace_vhost_vdpa_set_vring_addr(dev, addr->index, addr->flags,
addr->desc_user_addr, addr->used_user_addr,
addr->avail_user_addr,
addr->log_guest_addr);
return vhost_vdpa_call(dev, VHOST_SET_VRING_ADDR, addr);
}
static int vhost_vdpa_set_vring_num(struct vhost_dev *dev,
struct vhost_vring_state *ring)
{
trace_vhost_vdpa_set_vring_num(dev, ring->index, ring->num);
return vhost_vdpa_call(dev, VHOST_SET_VRING_NUM, ring);
}
static int vhost_vdpa_set_vring_base(struct vhost_dev *dev,
struct vhost_vring_state *ring)
{
trace_vhost_vdpa_set_vring_base(dev, ring->index, ring->num);
return vhost_vdpa_call(dev, VHOST_SET_VRING_BASE, ring);
}
static int vhost_vdpa_get_vring_base(struct vhost_dev *dev,
struct vhost_vring_state *ring)
{
return vhost_vdpa_call(dev, VHOST_GET_VRING_BASE, ring);
int ret;
ret = vhost_vdpa_call(dev, VHOST_GET_VRING_BASE, ring);
trace_vhost_vdpa_get_vring_base(dev, ring->index, ring->num);
return ret;
}
static int vhost_vdpa_set_vring_kick(struct vhost_dev *dev,
struct vhost_vring_file *file)
{
trace_vhost_vdpa_set_vring_kick(dev, file->index, file->fd);
return vhost_vdpa_call(dev, VHOST_SET_VRING_KICK, file);
}
static int vhost_vdpa_set_vring_call(struct vhost_dev *dev,
struct vhost_vring_file *file)
{
trace_vhost_vdpa_set_vring_call(dev, file->index, file->fd);
return vhost_vdpa_call(dev, VHOST_SET_VRING_CALL, file);
}
static int vhost_vdpa_get_features(struct vhost_dev *dev,
uint64_t *features)
{
return vhost_vdpa_call(dev, VHOST_GET_FEATURES, features);
int ret;
ret = vhost_vdpa_call(dev, VHOST_GET_FEATURES, features);
trace_vhost_vdpa_get_features(dev, *features);
return ret;
}
static int vhost_vdpa_set_owner(struct vhost_dev *dev)
{
trace_vhost_vdpa_set_owner(dev);
return vhost_vdpa_call(dev, VHOST_SET_OWNER, NULL);
}
@ -424,6 +569,8 @@ static int vhost_vdpa_vq_get_addr(struct vhost_dev *dev,
addr->desc_user_addr = (uint64_t)(unsigned long)vq->desc_phys;
addr->avail_user_addr = (uint64_t)(unsigned long)vq->avail_phys;
addr->used_user_addr = (uint64_t)(unsigned long)vq->used_phys;
trace_vhost_vdpa_vq_get_addr(dev, vq, addr->desc_user_addr,
addr->avail_user_addr, addr->used_user_addr);
return 0;
}
@ -444,6 +591,7 @@ const VhostOps vdpa_ops = {
.vhost_set_vring_kick = vhost_vdpa_set_vring_kick,
.vhost_set_vring_call = vhost_vdpa_set_vring_call,
.vhost_get_features = vhost_vdpa_get_features,
.vhost_set_backend_cap = vhost_vdpa_set_backend_cap,
.vhost_set_owner = vhost_vdpa_set_owner,
.vhost_set_vring_endian = NULL,
.vhost_backend_memslots_limit = vhost_vdpa_memslots_limit,

10
hw/virtio/vhost-vsock-pci.c
View File

@ -44,6 +44,15 @@ static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VHostVSockPCI *dev = VHOST_VSOCK_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&dev->vdev);
VirtIODevice *virtio_dev = VIRTIO_DEVICE(vdev);
/*
* To avoid migration issues, we force virtio version 1 only when
* legacy check is enabled in the new machine types (>= 5.1).
*/
if (!virtio_legacy_check_disabled(virtio_dev)) {
virtio_pci_force_virtio_1(vpci_dev);
}
qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
}
@ -73,7 +82,6 @@ static void vhost_vsock_pci_instance_init(Object *obj)
static const VirtioPCIDeviceTypeInfo vhost_vsock_pci_info = {
.base_name = TYPE_VHOST_VSOCK_PCI,
.generic_name = "vhost-vsock-pci",
.transitional_name = "vhost-vsock-pci-transitional",
.non_transitional_name = "vhost-vsock-pci-non-transitional",
.instance_size = sizeof(VHostVSockPCI),
.instance_init = vhost_vsock_pci_instance_init,

49
hw/virtio/vhost.c
View File

@ -818,19 +818,41 @@ static int vhost_dev_set_features(struct vhost_dev *dev,
r = dev->vhost_ops->vhost_set_features(dev, features);
if (r < 0) {
VHOST_OPS_DEBUG("vhost_set_features failed");
goto out;
}
if (dev->vhost_ops->vhost_set_backend_cap) {
r = dev->vhost_ops->vhost_set_backend_cap(dev);
if (r < 0) {
VHOST_OPS_DEBUG("vhost_set_backend_cap failed");
goto out;
}
}
out:
return r < 0 ? -errno : 0;
}
static int vhost_dev_set_log(struct vhost_dev *dev, bool enable_log)
{
int r, i, idx;
hwaddr addr;
r = vhost_dev_set_features(dev, enable_log);
if (r < 0) {
goto err_features;
}
for (i = 0; i < dev->nvqs; ++i) {
idx = dev->vhost_ops->vhost_get_vq_index(dev, dev->vq_index + i);
addr = virtio_queue_get_desc_addr(dev->vdev, idx);
if (!addr) {
/*
* The queue might not be ready for start. If this
* is the case there is no reason to continue the process.
* The similar logic is used by the vhost_virtqueue_start()
* routine.
*/
continue;
}
r = vhost_virtqueue_set_addr(dev, dev->vqs + i, idx,
enable_log);
if (r < 0) {
@ -861,21 +883,42 @@ static int vhost_migration_log(MemoryListener *listener, bool enable)
dev->log_enabled = enable;
return 0;
}
r = 0;
if (!enable) {
r = vhost_dev_set_log(dev, false);
if (r < 0) {
return r;
goto check_dev_state;
}
vhost_log_put(dev, false);
} else {
vhost_dev_log_resize(dev, vhost_get_log_size(dev));
r = vhost_dev_set_log(dev, true);
if (r < 0) {
return r;
goto check_dev_state;
}
}
check_dev_state:
dev->log_enabled = enable;
return 0;
/*
* vhost-user-* devices could change their state during log
* initialization due to disconnect. So check dev state after
* vhost communication.
*/
if (!dev->started) {
/*
* Since device is in the stopped state, it is okay for
* migration. Return success.
*/
r = 0;
}
if (r) {
/* An error is occured. */
dev->log_enabled = false;
}
return r;
}
static void vhost_log_global_start(MemoryListener *listener)

2
hw/virtio/virtio-iommu-pci.c
View File

@ -69,6 +69,7 @@ static void virtio_iommu_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
object_property_set_link(OBJECT(dev), "primary-bus",
OBJECT(pci_get_bus(&vpci_dev->pci_dev)),
&error_abort);
virtio_pci_force_virtio_1(vpci_dev);
qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
}
@ -98,7 +99,6 @@ static void virtio_iommu_pci_instance_init(Object *obj)
static const VirtioPCIDeviceTypeInfo virtio_iommu_pci_info = {
.base_name = TYPE_VIRTIO_IOMMU_PCI,
.generic_name = "virtio-iommu-pci",
.transitional_name = "virtio-iommu-pci-transitional",
.non_transitional_name = "virtio-iommu-pci-non-transitional",
.instance_size = sizeof(VirtIOIOMMUPCI),
.instance_init = virtio_iommu_pci_instance_init,

8
hw/virtio/virtio-iommu.c
View File

@ -801,8 +801,12 @@ static void virtio_iommu_device_unrealize(DeviceState *dev)
VirtIOIOMMU *s = VIRTIO_IOMMU(dev);
g_hash_table_destroy(s->as_by_busptr);
g_tree_destroy(s->domains);
g_tree_destroy(s->endpoints);
if (s->domains) {
g_tree_destroy(s->domains);
}
if (s->endpoints) {
g_tree_destroy(s->endpoints);
}
virtio_delete_queue(s->req_vq);
virtio_delete_queue(s->event_vq);

3
hw/virtio/virtio-mem.c
View File

@ -318,6 +318,7 @@ static void virtio_mem_handle_request(VirtIODevice *vdev, VirtQueue *vq)
if (iov_to_buf(elem->out_sg, elem->out_num, 0, &req, len) < len) {
virtio_error(vdev, "virtio-mem protocol violation: invalid request"
" size: %d", len);
virtqueue_detach_element(vq, elem, 0);
g_free(elem);
return;
}
@ -327,6 +328,7 @@ static void virtio_mem_handle_request(VirtIODevice *vdev, VirtQueue *vq)
virtio_error(vdev, "virtio-mem protocol violation: not enough space"
" for response: %zu",
iov_size(elem->in_sg, elem->in_num));
virtqueue_detach_element(vq, elem, 0);
g_free(elem);
return;
}
@ -348,6 +350,7 @@ static void virtio_mem_handle_request(VirtIODevice *vdev, VirtQueue *vq)
default:
virtio_error(vdev, "virtio-mem protocol violation: unknown request"
" type: %d", type);
virtqueue_detach_element(vq, elem, 0);
g_free(elem);
return;
}

14
hw/virtio/virtio-pci.c
View File

@ -1597,8 +1597,18 @@ static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
if (legacy) {
if (!virtio_legacy_allowed(vdev)) {
error_setg(errp, "device is modern-only, use disable-legacy=on");
return;
/*
* To avoid migration issues, we allow legacy mode when legacy
* check is disabled in the old machine types (< 5.1).
*/
if (virtio_legacy_check_disabled(vdev)) {
warn_report("device is modern-only, but for backward "
"compatibility legacy is allowed");
} else {
error_setg(errp,
"device is modern-only, use disable-legacy=on");
return;
}
}
if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by"

1
hw/virtio/virtio-pmem-pci.c
View File

@ -22,6 +22,7 @@ static void virtio_pmem_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
VirtIOPMEMPCI *pmem_pci = VIRTIO_PMEM_PCI(vpci_dev);
DeviceState *vdev = DEVICE(&pmem_pci->vdev);
virtio_pci_force_virtio_1(vpci_dev);
qdev_realize(vdev, BUS(&vpci_dev->bus), errp);
}

1
hw/virtio/virtio-pmem.c
View File

@ -77,6 +77,7 @@ static void virtio_pmem_flush(VirtIODevice *vdev, VirtQueue *vq)
if (req_data->elem.out_num < 1 || req_data->elem.in_num < 1) {
virtio_error(vdev, "virtio-pmem request not proper");
virtqueue_detach_element(vq, (VirtQueueElement *)req_data, 0);
g_free(req_data);
return;
}

24
hw/virtio/virtio.c
View File

@ -2963,17 +2963,16 @@ int virtio_set_features(VirtIODevice *vdev, uint64_t val)
return -EINVAL;
}
ret = virtio_set_features_nocheck(vdev, val);
if (!ret) {
if (virtio_vdev_has_feature(vdev, VIRTIO_RING_F_EVENT_IDX)) {
/* VIRTIO_RING_F_EVENT_IDX changes the size of the caches. */
int i;
for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
if (vdev->vq[i].vring.num != 0) {
virtio_init_region_cache(vdev, i);
}
if (virtio_vdev_has_feature(vdev, VIRTIO_RING_F_EVENT_IDX)) {
/* VIRTIO_RING_F_EVENT_IDX changes the size of the caches. */
int i;
for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
if (vdev->vq[i].vring.num != 0) {
virtio_init_region_cache(vdev, i);
}
}
}
if (!ret) {
if (!virtio_device_started(vdev, vdev->status) &&
!virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) {
vdev->start_on_kick = true;
@ -3304,6 +3303,11 @@ bool virtio_legacy_allowed(VirtIODevice *vdev)
}
}
bool virtio_legacy_check_disabled(VirtIODevice *vdev)
{
return vdev->disable_legacy_check;
}
hwaddr virtio_queue_get_desc_addr(VirtIODevice *vdev, int n)
{
return vdev->vq[n].vring.desc;
@ -3713,6 +3717,8 @@ static Property virtio_properties[] = {
DEFINE_VIRTIO_COMMON_FEATURES(VirtIODevice, host_features),
DEFINE_PROP_BOOL("use-started", VirtIODevice, use_started, true),
DEFINE_PROP_BOOL("use-disabled-flag", VirtIODevice, use_disabled_flag, true),
DEFINE_PROP_BOOL("x-disable-legacy-check", VirtIODevice,
disable_legacy_check, false),
DEFINE_PROP_END_OF_LIST(),
};

2
include/hw/acpi/aml-build.h
View File

@ -290,6 +290,7 @@ Aml *aml_to_buffer(Aml *src, Aml *dst);
Aml *aml_store(Aml *val, Aml *target);
Aml *aml_and(Aml *arg1, Aml *arg2, Aml *dst);
Aml *aml_or(Aml *arg1, Aml *arg2, Aml *dst);
Aml *aml_land(Aml *arg1, Aml *arg2);
Aml *aml_lor(Aml *arg1, Aml *arg2);
Aml *aml_shiftleft(Aml *arg1, Aml *count);
Aml *aml_shiftright(Aml *arg1, Aml *count, Aml *dst);
@ -300,6 +301,7 @@ Aml *aml_increment(Aml *arg);
Aml *aml_decrement(Aml *arg);
Aml *aml_index(Aml *arg1, Aml *idx);
Aml *aml_notify(Aml *arg1, Aml *arg2);
Aml *aml_break(void);
Aml *aml_call0(const char *method);
Aml *aml_call1(const char *method, Aml *arg1);
Aml *aml_call2(const char *method, Aml *arg1, Aml *arg2);

1
include/hw/acpi/cpu.h
View File

@ -50,6 +50,7 @@ void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
typedef struct CPUHotplugFeatures {
bool acpi_1_compatible;
bool has_legacy_cphp;
const char *smi_path;
} CPUHotplugFeatures;
void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,

1
include/hw/boards.h
View File

@ -168,7 +168,6 @@ struct MachineClass {
void (*init)(MachineState *state);
void (*reset)(MachineState *state);
void (*wakeup)(MachineState *state);
void (*hot_add_cpu)(MachineState *state, const int64_t id, Error **errp);
int (*kvm_type)(MachineState *machine, const char *arg);
void (*smp_parse)(MachineState *ms, QemuOpts *opts);

4
include/hw/i386/ich9.h
View File

@ -245,7 +245,11 @@ struct ICH9LPCState {
#define ICH9_SMB_HST_D1 0x06
#define ICH9_SMB_HOST_BLOCK_DB 0x07
#define ICH9_LPC_SMI_NEGOTIATED_FEAT_PROP "x-smi-negotiated-features"
/* bit positions used in fw_cfg SMI feature negotiation */
#define ICH9_LPC_SMI_F_BROADCAST_BIT 0
#define ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT 1
#define ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT 2
#endif /* HW_ICH9_H */

1
include/hw/i386/pc.h
View File

@ -132,7 +132,6 @@ extern int fd_bootchk;
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp);
void pc_smp_parse(MachineState *ms, QemuOpts *opts);
void pc_guest_info_init(PCMachineState *pcms);

2
include/hw/virtio/vhost-backend.h
View File

@ -74,6 +74,7 @@ typedef int (*vhost_set_features_op)(struct vhost_dev *dev,
uint64_t features);
typedef int (*vhost_get_features_op)(struct vhost_dev *dev,
uint64_t *features);
typedef int (*vhost_set_backend_cap_op)(struct vhost_dev *dev);
typedef int (*vhost_set_owner_op)(struct vhost_dev *dev);
typedef int (*vhost_reset_device_op)(struct vhost_dev *dev);
typedef int (*vhost_get_vq_index_op)(struct vhost_dev *dev, int idx);
@ -146,6 +147,7 @@ typedef struct VhostOps {
vhost_set_vring_busyloop_timeout_op vhost_set_vring_busyloop_timeout;
vhost_set_features_op vhost_set_features;
vhost_get_features_op vhost_get_features;
vhost_set_backend_cap_op vhost_set_backend_cap;
vhost_set_owner_op vhost_set_owner;
vhost_reset_device_op vhost_reset_device;
vhost_get_vq_index_op vhost_get_vq_index;

10
include/hw/virtio/vhost-user-blk.h
View File

@ -40,7 +40,17 @@ struct VHostUserBlk {
VhostUserState vhost_user;
struct vhost_virtqueue *vhost_vqs;
VirtQueue **virtqs;
/*
* There are at least two steps of initialization of the
* vhost-user device. The first is a "connect" step and
* second is a "start" step. Make a separation between
* those initialization phases by using two fields.
*/
/* vhost_user_blk_connect/vhost_user_blk_disconnect */
bool connected;
/* vhost_user_blk_start/vhost_user_blk_stop */
bool started_vu;
};
#endif

1
include/hw/virtio/vhost-vdpa.h
View File

@ -18,6 +18,7 @@ typedef struct vhost_vdpa {
int device_fd;
uint32_t msg_type;
MemoryListener listener;
struct vhost_dev *dev;
} VhostVDPA;
extern AddressSpace address_space_memory;

1
include/hw/virtio/vhost.h
View File

@ -79,6 +79,7 @@ struct vhost_dev {
uint64_t backend_features;
uint64_t protocol_features;
uint64_t max_queues;
uint64_t backend_cap;
bool started;
bool log_enabled;
uint64_t log_size;

2
include/hw/virtio/virtio.h
View File

@ -101,6 +101,7 @@ struct VirtIODevice
bool use_started;
bool started;
bool start_on_kick; /* when virtio 1.0 feature has not been negotiated */
bool disable_legacy_check;
VMChangeStateEntry *vmstate;
char *bus_name;
uint8_t device_endian;
@ -394,5 +395,6 @@ static inline bool virtio_device_disabled(VirtIODevice *vdev)
}
bool virtio_legacy_allowed(VirtIODevice *vdev);
bool virtio_legacy_check_disabled(VirtIODevice *vdev);
#endif

1
include/monitor/hmp.h
View File

@ -89,7 +89,6 @@ void hmp_chardev_add(Monitor *mon, const QDict *qdict);
void hmp_chardev_change(Monitor *mon, const QDict *qdict);
void hmp_chardev_remove(Monitor *mon, const QDict *qdict);
void hmp_chardev_send_break(Monitor *mon, const QDict *qdict);
void hmp_cpu_add(Monitor *mon, const QDict *qdict);
void hmp_object_add(Monitor *mon, const QDict *qdict);
void hmp_object_del(Monitor *mon, const QDict *qdict);
void hmp_info_memdev(Monitor *mon, const QDict *qdict);

8
include/qemu-common.h
View File

@ -134,6 +134,14 @@ void os_setup_early_signal_handling(void);
char *os_find_datadir(void);
int os_parse_cmd_args(int index, const char *optarg);
/*
* Hexdump a line of a byte buffer into a hexadecimal/ASCII buffer
*/
#define QEMU_HEXDUMP_LINE_BYTES 16 /* Number of bytes to dump */
#define QEMU_HEXDUMP_LINE_LEN 75 /* Number of characters in line */
void qemu_hexdump_line(char *line, unsigned int b, const void *bufptr,
unsigned int len, bool ascii);
/*
* Hexdump a buffer to a file. An optional string prefix is added to every line
*/

140
include/standard-headers/drm/drm_fourcc.h
View File

@ -235,6 +235,12 @@ extern "C" {
#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
/*
* 2 plane YCbCr
* index 0 = Y plane, [39:0] Y3:Y2:Y1:Y0 little endian
* index 1 = Cr:Cb plane, [39:0] Cr1:Cb1:Cr0:Cb0 little endian
*/
#define DRM_FORMAT_NV15 fourcc_code('N', 'V', '1', '5') /* 2x2 subsampled Cr:Cb plane */
/*
* 2 plane YCbCr MSB aligned
@ -264,6 +270,22 @@ extern "C" {
*/
#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */
/* 3 plane non-subsampled (444) YCbCr
* 16 bits per component, but only 10 bits are used and 6 bits are padded
* index 0: Y plane, [15:0] Y:x [10:6] little endian
* index 1: Cb plane, [15:0] Cb:x [10:6] little endian
* index 2: Cr plane, [15:0] Cr:x [10:6] little endian
*/
#define DRM_FORMAT_Q410 fourcc_code('Q', '4', '1', '0')
/* 3 plane non-subsampled (444) YCrCb
* 16 bits per component, but only 10 bits are used and 6 bits are padded
* index 0: Y plane, [15:0] Y:x [10:6] little endian
* index 1: Cr plane, [15:0] Cr:x [10:6] little endian
* index 2: Cb plane, [15:0] Cb:x [10:6] little endian
*/
#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1')
/*
* 3 plane YCbCr
* index 0: Y plane, [7:0] Y
@ -308,6 +330,7 @@ extern "C" {
#define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07
#define DRM_FORMAT_MOD_VENDOR_ARM 0x08
#define DRM_FORMAT_MOD_VENDOR_ALLWINNER 0x09
#define DRM_FORMAT_MOD_VENDOR_AMLOGIC 0x0a
/* add more to the end as needed */
@ -322,8 +345,33 @@ extern "C" {
* When adding a new token please document the layout with a code comment,
* similar to the fourcc codes above. drm_fourcc.h is considered the
* authoritative source for all of these.
*
* Generic modifier names:
*
* DRM_FORMAT_MOD_GENERIC_* definitions are used to provide vendor-neutral names
* for layouts which are common across multiple vendors. To preserve
* compatibility, in cases where a vendor-specific definition already exists and
* a generic name for it is desired, the common name is a purely symbolic alias
* and must use the same numerical value as the original definition.
*
* Note that generic names should only be used for modifiers which describe
* generic layouts (such as pixel re-ordering), which may have
* independently-developed support across multiple vendors.
*
* In future cases where a generic layout is identified before merging with a
* vendor-specific modifier, a new 'GENERIC' vendor or modifier using vendor
* 'NONE' could be considered. This should only be for obvious, exceptional
* cases to avoid polluting the 'GENERIC' namespace with modifiers which only
* apply to a single vendor.
*
* Generic names should not be used for cases where multiple hardware vendors
* have implementations of the same standardised compression scheme (such as
* AFBC). In those cases, all implementations should use the same format
* modifier(s), reflecting the vendor of the standard.
*/
#define DRM_FORMAT_MOD_GENERIC_16_16_TILE DRM_FORMAT_MOD_SAMSUNG_16_16_TILE
/*
* Invalid Modifier
*
@ -891,6 +939,18 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
*/
#define AFBC_FORMAT_MOD_BCH (1ULL << 11)
/* AFBC uncompressed storage mode
*
* Indicates that the buffer is using AFBC uncompressed storage mode.
* In this mode all superblock payloads in the buffer use the uncompressed
* storage mode, which is usually only used for data which cannot be compressed.
* The buffer layout is the same as for AFBC buffers without USM set, this only
* affects the storage mode of the individual superblocks. Note that even a
* buffer without USM set may use uncompressed storage mode for some or all
* superblocks, USM just guarantees it for all.
*/
#define AFBC_FORMAT_MOD_USM (1ULL << 12)
/*
* Arm 16x16 Block U-Interleaved modifier
*
@ -915,6 +975,86 @@ drm_fourcc_canonicalize_nvidia_format_mod(uint64_t modifier)
*/
#define DRM_FORMAT_MOD_ALLWINNER_TILED fourcc_mod_code(ALLWINNER, 1)
/*
* Amlogic Video Framebuffer Compression modifiers
*
* Amlogic uses a proprietary lossless image compression protocol and format
* for their hardware video codec accelerators, either video decoders or
* video input encoders.
*
* It considerably reduces memory bandwidth while writing and reading
* frames in memory.
*
* The underlying storage is considered to be 3 components, 8bit or 10-bit
* per component YCbCr 420, single plane :
* - DRM_FORMAT_YUV420_8BIT
* - DRM_FORMAT_YUV420_10BIT
*
* The first 8 bits of the mode defines the layout, then the following 8 bits
* defines the options changing the layout.
*
* Not all combinations are valid, and different SoCs may support different
* combinations of layout and options.
*/
#define __fourcc_mod_amlogic_layout_mask 0xf
#define __fourcc_mod_amlogic_options_shift 8
#define __fourcc_mod_amlogic_options_mask 0xf
#define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \
fourcc_mod_code(AMLOGIC, \
((__layout) & __fourcc_mod_amlogic_layout_mask) | \
(((__options) & __fourcc_mod_amlogic_options_mask) \
<< __fourcc_mod_amlogic_options_shift))
/* Amlogic FBC Layouts */
/*
* Amlogic FBC Basic Layout
*
* The basic layout is composed of:
* - a body content organized in 64x32 superblocks with 4096 bytes per
* superblock in default mode.
* - a 32 bytes per 128x64 header block
*
* This layout is transferrable between Amlogic SoCs supporting this modifier.
*/
#define AMLOGIC_FBC_LAYOUT_BASIC (1ULL)
/*
* Amlogic FBC Scatter Memory layout
*
* Indicates the header contains IOMMU references to the compressed
* frames content to optimize memory access and layout.
*
* In this mode, only the header memory address is needed, thus the
* content memory organization is tied to the current producer
* execution and cannot be saved/dumped neither transferrable between
* Amlogic SoCs supporting this modifier.
*
* Due to the nature of the layout, these buffers are not expected to
* be accessible by the user-space clients, but only accessible by the
* hardware producers and consumers.
*
* The user-space clients should expect a failure while trying to mmap
* the DMA-BUF handle returned by the producer.
*/
#define AMLOGIC_FBC_LAYOUT_SCATTER (2ULL)
/* Amlogic FBC Layout Options Bit Mask */
/*
* Amlogic FBC Memory Saving mode
*
* Indicates the storage is packed when pixel size is multiple of word
* boudaries, i.e. 8bit should be stored in this mode to save allocation
* memory.
*
* This mode reduces body layout to 3072 bytes per 64x32 superblock with
* the basic layout and 3200 bytes per 64x32 superblock combined with
* the scatter layout.
*/
#define AMLOGIC_FBC_OPTION_MEM_SAVING (1ULL << 0)
#if defined(__cplusplus)
}
#endif

87
include/standard-headers/linux/ethtool.h
View File

@ -579,6 +579,76 @@ struct ethtool_pauseparam {
uint32_t tx_pause;
};
/**
* enum ethtool_link_ext_state - link extended state
*/
enum ethtool_link_ext_state {
ETHTOOL_LINK_EXT_STATE_AUTONEG,
ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE,
ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH,
ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY,
ETHTOOL_LINK_EXT_STATE_NO_CABLE,
ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE,
ETHTOOL_LINK_EXT_STATE_EEPROM_ISSUE,
ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE,
ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED,
ETHTOOL_LINK_EXT_STATE_OVERHEAT,
};
/**
* enum ethtool_link_ext_substate_autoneg - more information in addition to
* ETHTOOL_LINK_EXT_STATE_AUTONEG.
*/
enum ethtool_link_ext_substate_autoneg {
ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED = 1,
ETHTOOL_LINK_EXT_SUBSTATE_AN_ACK_NOT_RECEIVED,
ETHTOOL_LINK_EXT_SUBSTATE_AN_NEXT_PAGE_EXCHANGE_FAILED,
ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED_FORCE_MODE,
ETHTOOL_LINK_EXT_SUBSTATE_AN_FEC_MISMATCH_DURING_OVERRIDE,
ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_HCD,
};
/**
* enum ethtool_link_ext_substate_link_training - more information in addition to
* ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE.
*/
enum ethtool_link_ext_substate_link_training {
ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_FRAME_LOCK_NOT_ACQUIRED = 1,
ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_INHIBIT_TIMEOUT,
ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_PARTNER_DID_NOT_SET_RECEIVER_READY,
ETHTOOL_LINK_EXT_SUBSTATE_LT_REMOTE_FAULT,
};
/**
* enum ethtool_link_ext_substate_logical_mismatch - more information in addition
* to ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH.
*/
enum ethtool_link_ext_substate_link_logical_mismatch {
ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_BLOCK_LOCK = 1,
ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_AM_LOCK,
ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_GET_ALIGN_STATUS,
ETHTOOL_LINK_EXT_SUBSTATE_LLM_FC_FEC_IS_NOT_LOCKED,
ETHTOOL_LINK_EXT_SUBSTATE_LLM_RS_FEC_IS_NOT_LOCKED,
};
/**
* enum ethtool_link_ext_substate_bad_signal_integrity - more information in
* addition to ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY.
*/
enum ethtool_link_ext_substate_bad_signal_integrity {
ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS = 1,
ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE,
};
/**
* enum ethtool_link_ext_substate_cable_issue - more information in
* addition to ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE.
*/
enum ethtool_link_ext_substate_cable_issue {
ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE = 1,
ETHTOOL_LINK_EXT_SUBSTATE_CI_CABLE_TEST_FAILURE,
};
#define ETH_GSTRING_LEN 32
/**
@ -599,6 +669,7 @@ struct ethtool_pauseparam {
* @ETH_SS_SOF_TIMESTAMPING: SOF_TIMESTAMPING_* flags
* @ETH_SS_TS_TX_TYPES: timestamping Tx types
* @ETH_SS_TS_RX_FILTERS: timestamping Rx filters
* @ETH_SS_UDP_TUNNEL_TYPES: UDP tunnel types
*/
enum ethtool_stringset {
ETH_SS_TEST = 0,
@ -616,6 +687,7 @@ enum ethtool_stringset {
ETH_SS_SOF_TIMESTAMPING,
ETH_SS_TS_TX_TYPES,
ETH_SS_TS_RX_FILTERS,
ETH_SS_UDP_TUNNEL_TYPES,
/* add new constants above here */
ETH_SS_COUNT
@ -1530,6 +1602,21 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72,
ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73,
ETHTOOL_LINK_MODE_FEC_LLRS_BIT = 74,
ETHTOOL_LINK_MODE_100000baseKR_Full_BIT = 75,
ETHTOOL_LINK_MODE_100000baseSR_Full_BIT = 76,
ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT = 77,
ETHTOOL_LINK_MODE_100000baseCR_Full_BIT = 78,
ETHTOOL_LINK_MODE_100000baseDR_Full_BIT = 79,
ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT = 80,
ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT = 81,
ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT = 82,
ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT = 83,
ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT = 84,
ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT = 85,
ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT = 86,
ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT = 87,
ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT = 88,
ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89,
/* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS
};

3
include/standard-headers/linux/input-event-codes.h
View File

@ -888,7 +888,8 @@
#define SW_LINEIN_INSERT 0x0d /* set = inserted */
#define SW_MUTE_DEVICE 0x0e /* set = device disabled */
#define SW_PEN_INSERTED 0x0f /* set = pen inserted */
#define SW_MAX_ 0x0f
#define SW_MACHINE_COVER 0x10 /* set = cover closed */
#define SW_MAX_ 0x10
#define SW_CNT (SW_MAX_+1)
/*

11
include/standard-headers/linux/vhost_types.h
View File

@ -60,6 +60,17 @@ struct vhost_iotlb_msg {
#define VHOST_IOTLB_UPDATE 2
#define VHOST_IOTLB_INVALIDATE 3
#define VHOST_IOTLB_ACCESS_FAIL 4
/*
* VHOST_IOTLB_BATCH_BEGIN and VHOST_IOTLB_BATCH_END allow modifying
* multiple mappings in one go: beginning with
* VHOST_IOTLB_BATCH_BEGIN, followed by any number of
* VHOST_IOTLB_UPDATE messages, and ending with VHOST_IOTLB_BATCH_END.
* When one of these two values is used as the message type, the rest
* of the fields in the message are ignored. There's no guarantee that
* these changes take place automatically in the device.
*/
#define VHOST_IOTLB_BATCH_BEGIN 5
#define VHOST_IOTLB_BATCH_END 6
uint8_t type;
};

4
include/standard-headers/linux/virtio_9p.h
View File

@ -25,7 +25,7 @@
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE. */
#include "standard-headers/linux/types.h"
#include "standard-headers/linux/virtio_types.h"
#include "standard-headers/linux/virtio_ids.h"
#include "standard-headers/linux/virtio_config.h"
@ -36,7 +36,7 @@
struct virtio_9p_config {
/* length of the tag name */
uint16_t tag_len;
__virtio16 tag_len;
/* non-NULL terminated tag name */
uint8_t tag[0];
} QEMU_PACKED;

26
include/standard-headers/linux/virtio_blk.h
View File

@ -55,20 +55,20 @@
struct virtio_blk_config {
/* The capacity (in 512-byte sectors). */
uint64_t capacity;
__virtio64 capacity;
/* The maximum segment size (if VIRTIO_BLK_F_SIZE_MAX) */
uint32_t size_max;
__virtio32 size_max;
/* The maximum number of segments (if VIRTIO_BLK_F_SEG_MAX) */
uint32_t seg_max;
__virtio32 seg_max;
/* geometry of the device (if VIRTIO_BLK_F_GEOMETRY) */
struct virtio_blk_geometry {
uint16_t cylinders;
__virtio16 cylinders;
uint8_t heads;
uint8_t sectors;
} geometry;
/* block size of device (if VIRTIO_BLK_F_BLK_SIZE) */
uint32_t blk_size;
__virtio32 blk_size;
/* the next 4 entries are guarded by VIRTIO_BLK_F_TOPOLOGY */
/* exponent for physical block per logical block. */
@ -76,42 +76,42 @@ struct virtio_blk_config {
/* alignment offset in logical blocks. */
uint8_t alignment_offset;
/* minimum I/O size without performance penalty in logical blocks. */
uint16_t min_io_size;
__virtio16 min_io_size;
/* optimal sustained I/O size in logical blocks. */
uint32_t opt_io_size;
__virtio32 opt_io_size;
/* writeback mode (if VIRTIO_BLK_F_CONFIG_WCE) */
uint8_t wce;
uint8_t unused;
/* number of vqs, only available when VIRTIO_BLK_F_MQ is set */
uint16_t num_queues;
__virtio16 num_queues;
/* the next 3 entries are guarded by VIRTIO_BLK_F_DISCARD */
/*
* The maximum discard sectors (in 512-byte sectors) for
* one segment.
*/
uint32_t max_discard_sectors;
__virtio32 max_discard_sectors;
/*
* The maximum number of discard segments in a
* discard command.
*/
uint32_t max_discard_seg;
__virtio32 max_discard_seg;
/* Discard commands must be aligned to this number of sectors. */
uint32_t discard_sector_alignment;
__virtio32 discard_sector_alignment;
/* the next 3 entries are guarded by VIRTIO_BLK_F_WRITE_ZEROES */
/*
* The maximum number of write zeroes sectors (in 512-byte sectors) in
* one segment.
*/
uint32_t max_write_zeroes_sectors;
__virtio32 max_write_zeroes_sectors;
/*
* The maximum number of segments in a write zeroes
* command.
*/
uint32_t max_write_zeroes_seg;
__virtio32 max_write_zeroes_seg;
/*
* Set if a VIRTIO_BLK_T_WRITE_ZEROES request may result in the
* deallocation of one or more of the sectors.

8
include/standard-headers/linux/virtio_config.h
View File

@ -67,13 +67,15 @@
#define VIRTIO_F_VERSION_1 32
/*
* If clear - device has the IOMMU bypass quirk feature.
* If set - use platform tools to detect the IOMMU.
* If clear - device has the platform DMA (e.g. IOMMU) bypass quirk feature.
* If set - use platform DMA tools to access the memory.
*
* Note the reverse polarity (compared to most other features),
* this is for compatibility with legacy systems.
*/
#define VIRTIO_F_IOMMU_PLATFORM 33
#define VIRTIO_F_ACCESS_PLATFORM 33
/* Legacy name for VIRTIO_F_ACCESS_PLATFORM (for compatibility with old userspace) */
#define VIRTIO_F_IOMMU_PLATFORM VIRTIO_F_ACCESS_PLATFORM
/* This feature indicates support for the packed virtqueue layout. */
#define VIRTIO_F_RING_PACKED 34

8
include/standard-headers/linux/virtio_console.h
View File

@ -45,13 +45,13 @@
struct virtio_console_config {
/* colums of the screens */
uint16_t cols;
__virtio16 cols;
/* rows of the screens */
uint16_t rows;
__virtio16 rows;
/* max. number of ports this device can hold */
uint32_t max_nr_ports;
__virtio32 max_nr_ports;
/* emergency write register */
uint32_t emerg_wr;
__virtio32 emerg_wr;
} QEMU_PACKED;
/*

6
include/standard-headers/linux/virtio_net.h
View File

@ -87,14 +87,14 @@ struct virtio_net_config {
/* The config defining mac address (if VIRTIO_NET_F_MAC) */
uint8_t mac[ETH_ALEN];
/* See VIRTIO_NET_F_STATUS and VIRTIO_NET_S_* above */
uint16_t status;
__virtio16 status;
/* Maximum number of each of transmit and receive queues;
* see VIRTIO_NET_F_MQ and VIRTIO_NET_CTRL_MQ.
* Legal values are between 1 and 0x8000
*/
uint16_t max_virtqueue_pairs;
__virtio16 max_virtqueue_pairs;
/* Default maximum transmit unit advice */
uint16_t mtu;
__virtio16 mtu;
/*
* speed, in units of 1Mb. All values 0 to INT_MAX are legal.
* Any other value stands for unknown.

20
include/standard-headers/linux/virtio_scsi.h
View File

@ -103,16 +103,16 @@ struct virtio_scsi_event {
} QEMU_PACKED;
struct virtio_scsi_config {
uint32_t num_queues;
uint32_t seg_max;
uint32_t max_sectors;
uint32_t cmd_per_lun;
uint32_t event_info_size;
uint32_t sense_size;
uint32_t cdb_size;
uint16_t max_channel;
uint16_t max_target;
uint32_t max_lun;
__virtio32 num_queues;
__virtio32 seg_max;
__virtio32 max_sectors;
__virtio32 cmd_per_lun;
__virtio32 event_info_size;
__virtio32 sense_size;
__virtio32 cdb_size;
__virtio16 max_channel;
__virtio16 max_target;
__virtio32 max_lun;
} QEMU_PACKED;
/* Feature Bits */

6
linux-headers/asm-generic/unistd.h
View File

@ -606,9 +606,9 @@ __SYSCALL(__NR_sendto, sys_sendto)
#define __NR_recvfrom 207
__SC_COMP(__NR_recvfrom, sys_recvfrom, compat_sys_recvfrom)
#define __NR_setsockopt 208
__SC_COMP(__NR_setsockopt, sys_setsockopt, compat_sys_setsockopt)
__SC_COMP(__NR_setsockopt, sys_setsockopt, sys_setsockopt)
#define __NR_getsockopt 209
__SC_COMP(__NR_getsockopt, sys_getsockopt, compat_sys_getsockopt)
__SC_COMP(__NR_getsockopt, sys_getsockopt, sys_getsockopt)
#define __NR_shutdown 210
__SYSCALL(__NR_shutdown, sys_shutdown)
#define __NR_sendmsg 211
@ -850,6 +850,8 @@ __SYSCALL(__NR_pidfd_open, sys_pidfd_open)
#define __NR_clone3 435
__SYSCALL(__NR_clone3, sys_clone3)
#endif
#define __NR_close_range 436
__SYSCALL(__NR_close_range, sys_close_range)
#define __NR_openat2 437
__SYSCALL(__NR_openat2, sys_openat2)

1
linux-headers/asm-mips/unistd_n32.h
View File

@ -365,6 +365,7 @@
#define __NR_fspick (__NR_Linux + 433)
#define __NR_pidfd_open (__NR_Linux + 434)
#define __NR_clone3 (__NR_Linux + 435)
#define __NR_close_range (__NR_Linux + 436)
#define __NR_openat2 (__NR_Linux + 437)
#define __NR_pidfd_getfd (__NR_Linux + 438)
#define __NR_faccessat2 (__NR_Linux + 439)

1
linux-headers/asm-mips/unistd_n64.h
View File

@ -341,6 +341,7 @@
#define __NR_fspick (__NR_Linux + 433)
#define __NR_pidfd_open (__NR_Linux + 434)
#define __NR_clone3 (__NR_Linux + 435)
#define __NR_close_range (__NR_Linux + 436)
#define __NR_openat2 (__NR_Linux + 437)
#define __NR_pidfd_getfd (__NR_Linux + 438)
#define __NR_faccessat2 (__NR_Linux + 439)

1
linux-headers/asm-mips/unistd_o32.h
View File

@ -411,6 +411,7 @@
#define __NR_fspick (__NR_Linux + 433)
#define __NR_pidfd_open (__NR_Linux + 434)
#define __NR_clone3 (__NR_Linux + 435)
#define __NR_close_range (__NR_Linux + 436)
#define __NR_openat2 (__NR_Linux + 437)
#define __NR_pidfd_getfd (__NR_Linux + 438)
#define __NR_faccessat2 (__NR_Linux + 439)

5
linux-headers/asm-powerpc/kvm.h
View File

@ -640,6 +640,11 @@ struct kvm_ppc_cpu_char {
#define KVM_REG_PPC_ONLINE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbf)
#define KVM_REG_PPC_PTCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc0)
/* POWER10 registers */
#define KVM_REG_PPC_MMCR3 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc1)
#define KVM_REG_PPC_SIER2 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc2)
#define KVM_REG_PPC_SIER3 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3)
/* Transactional Memory checkpointed state:
* This is all GPRs, all VSX regs and a subset of SPRs
*/

1
linux-headers/asm-powerpc/unistd_32.h
View File

@ -418,6 +418,7 @@
#define __NR_fspick 433
#define __NR_pidfd_open 434
#define __NR_clone3 435
#define __NR_close_range 436
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439

1
linux-headers/asm-powerpc/unistd_64.h
View File

@ -390,6 +390,7 @@
#define __NR_fspick 433
#define __NR_pidfd_open 434
#define __NR_clone3 435
#define __NR_close_range 436
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439

7
linux-headers/asm-s390/kvm.h
View File

@ -231,11 +231,13 @@ struct kvm_guest_debug_arch {
#define KVM_SYNC_GSCB (1UL << 9)
#define KVM_SYNC_BPBC (1UL << 10)
#define KVM_SYNC_ETOKEN (1UL << 11)
#define KVM_SYNC_DIAG318 (1UL << 12)
#define KVM_SYNC_S390_VALID_FIELDS \
(KVM_SYNC_PREFIX | KVM_SYNC_GPRS | KVM_SYNC_ACRS | KVM_SYNC_CRS | \
KVM_SYNC_ARCH0 | KVM_SYNC_PFAULT | KVM_SYNC_VRS | KVM_SYNC_RICCB | \
KVM_SYNC_FPRS | KVM_SYNC_GSCB | KVM_SYNC_BPBC | KVM_SYNC_ETOKEN)
KVM_SYNC_FPRS | KVM_SYNC_GSCB | KVM_SYNC_BPBC | KVM_SYNC_ETOKEN | \
KVM_SYNC_DIAG318)
/* length and alignment of the sdnx as a power of two */
#define SDNXC 8
@ -264,7 +266,8 @@ struct kvm_sync_regs {
__u8 reserved2 : 7;
__u8 padding1[51]; /* riccb needs to be 64byte aligned */
__u8 riccb[64]; /* runtime instrumentation controls block */
__u8 padding2[192]; /* sdnx needs to be 256byte aligned */
__u64 diag318; /* diagnose 0x318 info */
__u8 padding2[184]; /* sdnx needs to be 256byte aligned */
union {
__u8 sdnx[SDNXL]; /* state description annex */
struct {

1
linux-headers/asm-s390/unistd_32.h
View File

@ -408,6 +408,7 @@
#define __NR_fspick 433
#define __NR_pidfd_open 434
#define __NR_clone3 435
#define __NR_close_range 436
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439

1
linux-headers/asm-s390/unistd_64.h
View File

@ -356,6 +356,7 @@
#define __NR_fspick 433
#define __NR_pidfd_open 434
#define __NR_clone3 435
#define __NR_close_range 436
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439

1
linux-headers/asm-x86/unistd_32.h
View File

@ -426,6 +426,7 @@
#define __NR_fspick 433
#define __NR_pidfd_open 434
#define __NR_clone3 435
#define __NR_close_range 436
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439

1
linux-headers/asm-x86/unistd_64.h
View File

@ -348,6 +348,7 @@
#define __NR_fspick 433
#define __NR_pidfd_open 434
#define __NR_clone3 435
#define __NR_close_range 436
#define __NR_openat2 437
#define __NR_pidfd_getfd 438
#define __NR_faccessat2 439

1
linux-headers/asm-x86/unistd_x32.h
View File

@ -301,6 +301,7 @@
#define __NR_fspick (__X32_SYSCALL_BIT + 433)
#define __NR_pidfd_open (__X32_SYSCALL_BIT + 434)
#define __NR_clone3 (__X32_SYSCALL_BIT + 435)
#define __NR_close_range (__X32_SYSCALL_BIT + 436)
#define __NR_openat2 (__X32_SYSCALL_BIT + 437)
#define __NR_pidfd_getfd (__X32_SYSCALL_BIT + 438)
#define __NR_faccessat2 (__X32_SYSCALL_BIT + 439)

4
linux-headers/linux/kvm.h
View File

@ -289,6 +289,7 @@ struct kvm_run {
/* KVM_EXIT_FAIL_ENTRY */
struct {
__u64 hardware_entry_failure_reason;
__u32 cpu;
} fail_entry;
/* KVM_EXIT_EXCEPTION */
struct {
@ -1031,6 +1032,9 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_PPC_SECURE_GUEST 181
#define KVM_CAP_HALT_POLL 182
#define KVM_CAP_ASYNC_PF_INT 183
#define KVM_CAP_LAST_CPU 184
#define KVM_CAP_SMALLER_MAXPHYADDR 185
#define KVM_CAP_S390_DIAG318 186
#ifdef KVM_CAP_IRQ_ROUTING

2
linux-headers/linux/vfio.h
View File

@ -1030,7 +1030,7 @@ struct vfio_iommu_type1_info_cap_iova_range {
* size in bytes that can be used by user applications when getting the dirty
* bitmap.
*/
#define VFIO_IOMMU_TYPE1_INFO_CAP_MIGRATION 1
#define VFIO_IOMMU_TYPE1_INFO_CAP_MIGRATION 2
struct vfio_iommu_type1_info_cap_migration {
struct vfio_info_cap_header header;

2
linux-headers/linux/vhost.h
View File

@ -91,6 +91,8 @@
/* Use message type V2 */
#define VHOST_BACKEND_F_IOTLB_MSG_V2 0x1
/* IOTLB can accept batching hints */
#define VHOST_BACKEND_F_IOTLB_BATCH 0x2
#define VHOST_SET_BACKEND_FEATURES _IOW(VHOST_VIRTIO, 0x25, __u64)
#define VHOST_GET_BACKEND_FEATURES _IOR(VHOST_VIRTIO, 0x26, __u64)

1
meson.build
View File

@ -521,6 +521,7 @@ kconfig_external_symbols = [
'CONFIG_OPENGL',
'CONFIG_X11',
'CONFIG_VHOST_USER',
'CONFIG_VHOST_VDPA',
'CONFIG_VHOST_KERNEL',
'CONFIG_VIRTFS',
'CONFIG_LINUX',

10
net/vhost-user.c
View File

@ -226,7 +226,7 @@ static void chr_closed_bh(void *opaque)
NetClientState *ncs[MAX_QUEUE_NUM];
NetVhostUserState *s;
Error *err = NULL;
int queues;
int queues, i;
queues = qemu_find_net_clients_except(name, ncs,
NET_CLIENT_DRIVER_NIC,
@ -235,8 +235,12 @@ static void chr_closed_bh(void *opaque)
s = DO_UPCAST(NetVhostUserState, nc, ncs[0]);
if (s->vhost_net) {
s->acked_features = vhost_net_get_acked_features(s->vhost_net);
for (i = queues -1; i >= 0; i--) {
s = DO_UPCAST(NetVhostUserState, nc, ncs[i]);
if (s->vhost_net) {
s->acked_features = vhost_net_get_acked_features(s->vhost_net);
}
}
qmp_set_link(name, false, &err);

24
qapi/machine.json
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@ -307,30 +307,6 @@
##
{ 'command': 'query-cpus-fast', 'returns': [ 'CpuInfoFast' ] }
##
# @cpu-add:
#
# Adds CPU with specified ID.
#
# @id: ID of CPU to be created, valid values [0..max_cpus)
#
# Features:
# @deprecated: This command is deprecated. Use `device_add` instead.
# See the `query-hotpluggable-cpus` command for details.
#
# Returns: Nothing on success
#
# Since: 1.5
#
# Example:
#
# -> { "execute": "cpu-add", "arguments": { "id": 2 } }
# <- { "return": {} }
#
##
{ 'command': 'cpu-add', 'data': {'id': 'int'},
'features': [ 'deprecated' ] }
##
# @MachineInfo:
#

41
qemu-options.hx
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@ -2296,6 +2296,8 @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios,
"-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str]\n"
" [,asset=str][,part=str][,max-speed=%d][,current-speed=%d]\n"
" specify SMBIOS type 4 fields\n"
"-smbios type=11[,value=str][,path=filename]\n"
" specify SMBIOS type 11 fields\n"
"-smbios type=17[,loc_pfx=str][,bank=str][,manufacturer=str][,serial=str]\n"
" [,asset=str][,part=str][,speed=%d]\n"
" specify SMBIOS type 17 fields\n",
@ -2319,6 +2321,45 @@ SRST
``-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str][,asset=str][,part=str]``
Specify SMBIOS type 4 fields
``-smbios type=11[,value=str][,path=filename]``
Specify SMBIOS type 11 fields
This argument can be repeated multiple times, and values are added in the order they are parsed.
Applications intending to use OEM strings data are encouraged to use their application name as
a prefix for the value string. This facilitates passing information for multiple applications
concurrently.
The ``value=str`` syntax provides the string data inline, while the ``path=filename`` syntax
loads data from a file on disk. Note that the file is not permitted to contain any NUL bytes.
Both the ``value`` and ``path`` options can be repeated multiple times and will be added to
the SMBIOS table in the order in which they appear.
Note that on the x86 architecture, the total size of all SMBIOS tables is limited to 65535
bytes. Thus the OEM strings data is not suitable for passing large amounts of data into the
guest. Instead it should be used as a indicator to inform the guest where to locate the real
data set, for example, by specifying the serial ID of a block device.
An example passing three strings is
.. parsed-literal::
-smbios type=11,value=cloud-init:ds=nocloud-net;s=http://10.10.0.1:8000/,\\
value=anaconda:method=http://dl.fedoraproject.org/pub/fedora/linux/releases/25/x86_64/os,\\
path=/some/file/with/oemstringsdata.txt
In the guest OS this is visible with the ``dmidecode`` command
.. parsed-literal::
$ dmidecode -t 11
Handle 0x0E00, DMI type 11, 5 bytes
OEM Strings
String 1: cloud-init:ds=nocloud-net;s=http://10.10.0.1:8000/
String 2: anaconda:method=http://dl.fedoraproject.org/pub/fedora/linux/releases/25/x86_64/os
String 3: myapp:some extra data
``-smbios type=17[,loc_pfx=str][,bank=str][,manufacturer=str][,serial=str][,asset=str][,part=str][,speed=%d]``
Specify SMBIOS type 17 fields
ERST

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569
tests/Makefile.orig Normal file
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@ -0,0 +1,569 @@
export SRC_PATH
qapi-py = $(SRC_PATH)/scripts/qapi.py $(SRC_PATH)/scripts/ordereddict.py
# Get the list of all supported sysemu targets
SYSEMU_TARGET_LIST := $(subst -softmmu.mak,,$(notdir \
$(wildcard $(SRC_PATH)/default-configs/*-softmmu.mak)))
check-unit-y = tests/check-qdict$(EXESUF)
gcov-files-check-qdict-y = qobject/qdict.c
check-unit-y += tests/check-qfloat$(EXESUF)
gcov-files-check-qfloat-y = qobject/qfloat.c
check-unit-y += tests/check-qint$(EXESUF)
gcov-files-check-qint-y = qobject/qint.c
check-unit-y += tests/check-qstring$(EXESUF)
gcov-files-check-qstring-y = qobject/qstring.c
check-unit-y += tests/check-qlist$(EXESUF)
gcov-files-check-qlist-y = qobject/qlist.c
check-unit-y += tests/check-qjson$(EXESUF)
gcov-files-check-qjson-y = qobject/qjson.c
check-unit-y += tests/test-qmp-output-visitor$(EXESUF)
gcov-files-test-qmp-output-visitor-y = qapi/qmp-output-visitor.c
check-unit-y += tests/test-qmp-input-visitor$(EXESUF)
gcov-files-test-qmp-input-visitor-y = qapi/qmp-input-visitor.c
check-unit-y += tests/test-qmp-input-strict$(EXESUF)
check-unit-y += tests/test-qmp-commands$(EXESUF)
gcov-files-test-qmp-commands-y = qapi/qmp-dispatch.c
check-unit-y += tests/test-string-input-visitor$(EXESUF)
gcov-files-test-string-input-visitor-y = qapi/string-input-visitor.c
check-unit-y += tests/test-string-output-visitor$(EXESUF)
gcov-files-test-string-output-visitor-y = qapi/string-output-visitor.c
check-unit-y += tests/test-qmp-event$(EXESUF)
gcov-files-test-qmp-event-y += qapi/qmp-event.c
check-unit-y += tests/test-opts-visitor$(EXESUF)
gcov-files-test-opts-visitor-y = qapi/opts-visitor.c
check-unit-y += tests/test-coroutine$(EXESUF)
gcov-files-test-coroutine-y = coroutine-$(CONFIG_COROUTINE_BACKEND).c
check-unit-y += tests/test-visitor-serialization$(EXESUF)
check-unit-y += tests/test-iov$(EXESUF)
gcov-files-test-iov-y = util/iov.c
check-unit-y += tests/test-aio$(EXESUF)
check-unit-$(CONFIG_POSIX) += tests/test-rfifolock$(EXESUF)
check-unit-y += tests/test-throttle$(EXESUF)
gcov-files-test-aio-$(CONFIG_WIN32) = aio-win32.c
gcov-files-test-aio-$(CONFIG_POSIX) = aio-posix.c
check-unit-y += tests/test-thread-pool$(EXESUF)
gcov-files-test-thread-pool-y = thread-pool.c
gcov-files-test-hbitmap-y = util/hbitmap.c
check-unit-y += tests/test-hbitmap$(EXESUF)
check-unit-y += tests/test-x86-cpuid$(EXESUF)
# all code tested by test-x86-cpuid is inside topology.h
gcov-files-test-x86-cpuid-y =
ifeq ($(CONFIG_SOFTMMU),y)
check-unit-y += tests/test-xbzrle$(EXESUF)
gcov-files-test-xbzrle-y = migration/xbzrle.c
check-unit-$(CONFIG_POSIX) += tests/test-vmstate$(EXESUF)
endif
check-unit-y += tests/test-cutils$(EXESUF)
gcov-files-test-cutils-y += util/cutils.c
check-unit-y += tests/test-mul64$(EXESUF)
gcov-files-test-mul64-y = util/host-utils.c
check-unit-y += tests/test-int128$(EXESUF)
# all code tested by test-int128 is inside int128.h
gcov-files-test-int128-y =
check-unit-y += tests/rcutorture$(EXESUF)
gcov-files-rcutorture-y = util/rcu.c
check-unit-y += tests/test-rcu-list$(EXESUF)
gcov-files-test-rcu-list-y = util/rcu.c
check-unit-y += tests/test-bitops$(EXESUF)
check-unit-$(CONFIG_HAS_GLIB_SUBPROCESS_TESTS) += tests/test-qdev-global-props$(EXESUF)
check-unit-y += tests/check-qom-interface$(EXESUF)
gcov-files-check-qom-interface-y = qom/object.c
check-unit-y += tests/check-qom-proplist$(EXESUF)
gcov-files-check-qom-proplist-y = qom/object.c
check-unit-y += tests/test-qemu-opts$(EXESUF)
gcov-files-test-qemu-opts-y = qom/test-qemu-opts.c
check-unit-y += tests/test-write-threshold$(EXESUF)
gcov-files-test-write-threshold-y = block/write-threshold.c
check-unit-$(CONFIG_GNUTLS_HASH) += tests/test-crypto-hash$(EXESUF)
check-unit-y += tests/test-crypto-cipher$(EXESUF)
check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlscredsx509$(EXESUF)
check-unit-$(CONFIG_GNUTLS) += tests/test-crypto-tlssession$(EXESUF)
check-block-$(CONFIG_POSIX) += tests/qemu-iotests-quick.sh
# All QTests for now are POSIX-only, but the dependencies are
# really in libqtest, not in the testcases themselves.
gcov-files-ipack-y += hw/ipack/ipack.c
check-qtest-ipack-y += tests/ipoctal232-test$(EXESUF)
gcov-files-ipack-y += hw/char/ipoctal232.c
check-qtest-virtioserial-y += tests/virtio-console-test$(EXESUF)
gcov-files-virtioserial-y += hw/char/virtio-console.c
gcov-files-virtio-y += i386-softmmu/hw/virtio/virtio.c
check-qtest-virtio-y += tests/virtio-net-test$(EXESUF)
gcov-files-virtio-y += i386-softmmu/hw/net/virtio-net.c
check-qtest-virtio-y += tests/virtio-balloon-test$(EXESUF)
gcov-files-virtio-y += i386-softmmu/hw/virtio/virtio-balloon.c
check-qtest-virtio-y += tests/virtio-blk-test$(EXESUF)
gcov-files-virtio-y += i386-softmmu/hw/block/virtio-blk.c
check-qtest-virtio-y += tests/virtio-rng-test$(EXESUF)
gcov-files-virtio-y += hw/virtio/virtio-rng.c
check-qtest-virtio-y += tests/virtio-scsi-test$(EXESUF)
gcov-files-virtio-y += i386-softmmu/hw/scsi/virtio-scsi.c
ifeq ($(CONFIG_VIRTIO)$(CONFIG_VIRTFS)$(CONFIG_PCI),yyy)
check-qtest-virtio-y += tests/virtio-9p-test$(EXESUF)
gcov-files-virtio-y += hw/9pfs/virtio-9p.c
gcov-files-virtio-y += i386-softmmu/hw/9pfs/virtio-9p-device.c
endif
check-qtest-virtio-y += tests/virtio-serial-test$(EXESUF)
gcov-files-virtio-y += i386-softmmu/hw/char/virtio-serial-bus.c
check-qtest-virtio-y += $(check-qtest-virtioserial-y)
gcov-files-virtio-y += $(gcov-files-virtioserial-y)
check-qtest-pci-y += tests/e1000-test$(EXESUF)
gcov-files-pci-y += hw/net/e1000.c
check-qtest-pci-y += tests/rtl8139-test$(EXESUF)
gcov-files-pci-y += hw/net/rtl8139.c
check-qtest-pci-y += tests/pcnet-test$(EXESUF)
gcov-files-pci-y += hw/net/pcnet.c
gcov-files-pci-y += hw/net/pcnet-pci.c
check-qtest-pci-y += tests/eepro100-test$(EXESUF)
gcov-files-pci-y += hw/net/eepro100.c
check-qtest-pci-y += tests/ne2000-test$(EXESUF)
gcov-files-pci-y += hw/net/ne2000.c
check-qtest-pci-y += tests/nvme-test$(EXESUF)
gcov-files-pci-y += hw/block/nvme.c
check-qtest-pci-y += tests/ac97-test$(EXESUF)
gcov-files-pci-y += hw/audio/ac97.c
check-qtest-pci-y += tests/es1370-test$(EXESUF)
gcov-files-pci-y += hw/audio/es1370.c
check-qtest-pci-y += $(check-qtest-virtio-y)
gcov-files-pci-y += $(gcov-files-virtio-y) hw/virtio/virtio-pci.c
check-qtest-pci-y += tests/tpci200-test$(EXESUF)
gcov-files-pci-y += hw/ipack/tpci200.c
check-qtest-pci-y += $(check-qtest-ipack-y)
gcov-files-pci-y += $(gcov-files-ipack-y)
check-qtest-pci-y += tests/display-vga-test$(EXESUF)
gcov-files-pci-y += hw/display/vga.c
gcov-files-pci-y += hw/display/cirrus_vga.c
gcov-files-pci-y += hw/display/vga-pci.c
gcov-files-pci-y += hw/display/virtio-gpu.c
gcov-files-pci-y += hw/display/virtio-gpu-pci.c
gcov-files-pci-$(CONFIG_VIRTIO_VGA) += hw/display/virtio-vga.c
check-qtest-pci-y += tests/intel-hda-test$(EXESUF)
gcov-files-pci-y += hw/audio/intel-hda.c hw/audio/hda-codec.c
check-qtest-i386-y = tests/endianness-test$(EXESUF)
check-qtest-i386-y += tests/fdc-test$(EXESUF)
gcov-files-i386-y = hw/block/fdc.c
check-qtest-i386-y += tests/ide-test$(EXESUF)
check-qtest-i386-y += tests/ahci-test$(EXESUF)
check-qtest-i386-y += tests/hd-geo-test$(EXESUF)
gcov-files-i386-y += hw/block/hd-geometry.c
check-qtest-i386-y += tests/boot-order-test$(EXESUF)
check-qtest-i386-y += tests/bios-tables-test$(EXESUF)
check-qtest-i386-y += tests/rtc-test$(EXESUF)
check-qtest-i386-y += tests/i440fx-test$(EXESUF)
check-qtest-i386-y += tests/fw_cfg-test$(EXESUF)
check-qtest-i386-y += tests/drive_del-test$(EXESUF)
check-qtest-i386-y += tests/wdt_ib700-test$(EXESUF)
check-qtest-i386-y += tests/tco-test$(EXESUF)
gcov-files-i386-y += hw/watchdog/watchdog.c hw/watchdog/wdt_ib700.c
check-qtest-i386-y += $(check-qtest-pci-y)
gcov-files-i386-y += $(gcov-files-pci-y)
check-qtest-i386-y += tests/vmxnet3-test$(EXESUF)
gcov-files-i386-y += hw/net/vmxnet3.c
gcov-files-i386-y += hw/net/vmxnet_rx_pkt.c
gcov-files-i386-y += hw/net/vmxnet_tx_pkt.c
check-qtest-i386-y += tests/pvpanic-test$(EXESUF)
gcov-files-i386-y += i386-softmmu/hw/misc/pvpanic.c
check-qtest-i386-y += tests/i82801b11-test$(EXESUF)
gcov-files-i386-y += hw/pci-bridge/i82801b11.c
check-qtest-i386-y += tests/ioh3420-test$(EXESUF)
gcov-files-i386-y += hw/pci-bridge/ioh3420.c
check-qtest-i386-y += tests/usb-hcd-ohci-test$(EXESUF)
gcov-files-i386-y += hw/usb/hcd-ohci.c
check-qtest-i386-y += tests/usb-hcd-uhci-test$(EXESUF)
gcov-files-i386-y += hw/usb/hcd-uhci.c
check-qtest-i386-y += tests/usb-hcd-ehci-test$(EXESUF)
gcov-files-i386-y += hw/usb/hcd-ehci.c
gcov-files-i386-y += hw/usb/dev-hid.c
gcov-files-i386-y += hw/usb/dev-storage.c
check-qtest-i386-y += tests/usb-hcd-xhci-test$(EXESUF)
gcov-files-i386-y += hw/usb/hcd-xhci.c
check-qtest-i386-y += tests/pc-cpu-test$(EXESUF)
check-qtest-i386-y += tests/q35-test$(EXESUF)
gcov-files-i386-y += hw/pci-host/q35.c
ifeq ($(CONFIG_VHOST_NET),y)
check-qtest-i386-$(CONFIG_LINUX) += tests/vhost-user-test$(EXESUF)
endif
check-qtest-x86_64-y = $(check-qtest-i386-y)
gcov-files-i386-y += i386-softmmu/hw/timer/mc146818rtc.c
gcov-files-x86_64-y = $(subst i386-softmmu/,x86_64-softmmu/,$(gcov-files-i386-y))
check-qtest-mips-y = tests/endianness-test$(EXESUF)
check-qtest-mips64-y = tests/endianness-test$(EXESUF)
check-qtest-mips64el-y = tests/endianness-test$(EXESUF)
check-qtest-ppc-y = tests/endianness-test$(EXESUF)
check-qtest-ppc64-y = tests/endianness-test$(EXESUF)
check-qtest-sh4-y = tests/endianness-test$(EXESUF)
check-qtest-sh4eb-y = tests/endianness-test$(EXESUF)
check-qtest-sparc64-y = tests/endianness-test$(EXESUF)
#check-qtest-sparc-y = tests/m48t59-test$(EXESUF)
#check-qtest-sparc64-y += tests/m48t59-test$(EXESUF)
gcov-files-sparc-y += hw/timer/m48t59.c
gcov-files-sparc64-y += hw/timer/m48t59.c
check-qtest-arm-y = tests/tmp105-test$(EXESUF)
check-qtest-arm-y = tests/ds1338-test$(EXESUF)
gcov-files-arm-y += hw/misc/tmp105.c
check-qtest-arm-y += tests/virtio-blk-test$(EXESUF)
gcov-files-arm-y += arm-softmmu/hw/block/virtio-blk.c
check-qtest-ppc-y += tests/boot-order-test$(EXESUF)
check-qtest-ppc64-y += tests/boot-order-test$(EXESUF)
check-qtest-ppc64-y += tests/spapr-phb-test$(EXESUF)
gcov-files-ppc64-y += ppc64-softmmu/hw/ppc/spapr_pci.c
check-qtest-microblazeel-y = $(check-qtest-microblaze-y)
check-qtest-xtensaeb-y = $(check-qtest-xtensa-y)
# qom-test works for all sysemu architectures:
$(foreach target,$(SYSEMU_TARGET_LIST), \
$(if $(findstring tests/qom-test$(EXESUF), $(check-qtest-$(target)-y)),, \
$(eval check-qtest-$(target)-y += tests/qom-test$(EXESUF))))
check-qapi-schema-y := $(addprefix tests/qapi-schema/, \
comments.json empty.json enum-empty.json enum-missing-data.json \
enum-wrong-data.json enum-int-member.json enum-dict-member.json \
enum-clash-member.json enum-max-member.json enum-union-clash.json \
enum-bad-name.json enum-bad-prefix.json \
funny-char.json indented-expr.json \
missing-type.json bad-ident.json ident-with-escape.json \
escape-outside-string.json unknown-escape.json \
escape-too-short.json escape-too-big.json unicode-str.json \
double-type.json bad-base.json bad-type-bool.json bad-type-int.json \
bad-type-dict.json double-data.json unknown-expr-key.json \
redefined-type.json redefined-command.json redefined-builtin.json \
redefined-event.json command-int.json bad-data.json event-max.json \
type-bypass-bad-gen.json \
args-invalid.json \
args-array-empty.json args-array-unknown.json args-int.json \
args-unknown.json args-member-unknown.json args-member-array.json \
args-member-array-bad.json args-alternate.json args-union.json \
args-any.json \
returns-array-bad.json returns-int.json returns-dict.json \
returns-unknown.json returns-alternate.json returns-whitelist.json \
missing-colon.json missing-comma-list.json missing-comma-object.json \
struct-data-invalid.json struct-member-invalid.json \
nested-struct-data.json non-objects.json \
qapi-schema-test.json quoted-structural-chars.json \
leading-comma-list.json leading-comma-object.json \
trailing-comma-list.json trailing-comma-object.json \
unclosed-list.json unclosed-object.json unclosed-string.json \
duplicate-key.json union-invalid-base.json union-bad-branch.json \
union-optional-branch.json union-unknown.json union-max.json \
flat-union-optional-discriminator.json flat-union-no-base.json \
flat-union-invalid-discriminator.json flat-union-inline.json \
flat-union-invalid-branch-key.json flat-union-reverse-define.json \
flat-union-string-discriminator.json union-base-no-discriminator.json \
flat-union-bad-discriminator.json flat-union-bad-base.json \
flat-union-base-any.json \
flat-union-array-branch.json flat-union-int-branch.json \
flat-union-base-union.json flat-union-branch-clash.json \
alternate-nested.json alternate-unknown.json alternate-clash.json \
alternate-good.json alternate-base.json alternate-array.json \
alternate-conflict-string.json alternate-conflict-dict.json \
include-simple.json include-relpath.json include-format-err.json \
include-non-file.json include-no-file.json include-before-err.json \
include-nested-err.json include-self-cycle.json include-cycle.json \
include-repetition.json event-nest-struct.json event-case.json \
struct-base-clash.json struct-base-clash-deep.json )
GENERATED_HEADERS += tests/test-qapi-types.h tests/test-qapi-visit.h \
tests/test-qmp-commands.h tests/test-qapi-event.h \
tests/test-qmp-introspect.h
test-obj-y = tests/check-qint.o tests/check-qstring.o tests/check-qdict.o \
tests/check-qlist.o tests/check-qfloat.o tests/check-qjson.o \
tests/test-coroutine.o tests/test-string-output-visitor.o \
tests/test-string-input-visitor.o tests/test-qmp-output-visitor.o \
tests/test-qmp-input-visitor.o tests/test-qmp-input-strict.o \
tests/test-qmp-commands.o tests/test-visitor-serialization.o \
tests/test-x86-cpuid.o tests/test-mul64.o tests/test-int128.o \
tests/test-opts-visitor.o tests/test-qmp-event.o \
tests/rcutorture.o tests/test-rcu-list.o
$(test-obj-y): QEMU_INCLUDES += -Itests
QEMU_CFLAGS += -I$(SRC_PATH)/tests
# Deps that are common to various different sets of tests below
test-util-obj-y = libqemuutil.a libqemustub.a
test-qom-obj-y = $(qom-obj-y) $(test-util-obj-y)
test-qapi-obj-y = tests/test-qapi-visit.o tests/test-qapi-types.o \
tests/test-qapi-event.o tests/test-qmp-introspect.o \
$(test-qom-obj-y)
test-crypto-obj-y = $(crypto-obj-y) $(test-qom-obj-y)
test-block-obj-y = $(block-obj-y) $(test-crypto-obj-y)
tests/check-qint$(EXESUF): tests/check-qint.o $(test-util-obj-y)
tests/check-qstring$(EXESUF): tests/check-qstring.o $(test-util-obj-y)
tests/check-qdict$(EXESUF): tests/check-qdict.o $(test-util-obj-y)
tests/check-qlist$(EXESUF): tests/check-qlist.o $(test-util-obj-y)
tests/check-qfloat$(EXESUF): tests/check-qfloat.o $(test-util-obj-y)
tests/check-qjson$(EXESUF): tests/check-qjson.o $(test-util-obj-y)
tests/check-qom-interface$(EXESUF): tests/check-qom-interface.o $(test-qom-obj-y)
tests/check-qom-proplist$(EXESUF): tests/check-qom-proplist.o $(test-qom-obj-y)
tests/test-coroutine$(EXESUF): tests/test-coroutine.o $(test-block-obj-y)
tests/test-aio$(EXESUF): tests/test-aio.o $(test-block-obj-y)
tests/test-rfifolock$(EXESUF): tests/test-rfifolock.o $(test-util-obj-y)
tests/test-throttle$(EXESUF): tests/test-throttle.o $(test-block-obj-y)
tests/test-thread-pool$(EXESUF): tests/test-thread-pool.o $(test-block-obj-y)
tests/test-iov$(EXESUF): tests/test-iov.o $(test-util-obj-y)
tests/test-hbitmap$(EXESUF): tests/test-hbitmap.o $(test-util-obj-y)
tests/test-x86-cpuid$(EXESUF): tests/test-x86-cpuid.o
tests/test-xbzrle$(EXESUF): tests/test-xbzrle.o migration/xbzrle.o page_cache.o $(test-util-obj-y)
tests/test-cutils$(EXESUF): tests/test-cutils.o util/cutils.o
tests/test-int128$(EXESUF): tests/test-int128.o
tests/rcutorture$(EXESUF): tests/rcutorture.o $(test-util-obj-y)
tests/test-rcu-list$(EXESUF): tests/test-rcu-list.o $(test-util-obj-y)
tests/test-qdev-global-props$(EXESUF): tests/test-qdev-global-props.o \
hw/core/qdev.o hw/core/qdev-properties.o hw/core/hotplug.o\
hw/core/irq.o \
hw/core/fw-path-provider.o \
$(test-qapi-obj-y)
tests/test-vmstate$(EXESUF): tests/test-vmstate.o \
migration/vmstate.o migration/qemu-file.o migration/qemu-file-buf.o \
migration/qemu-file-unix.o qjson.o \
$(test-qom-obj-y)
tests/test-qapi-types.c tests/test-qapi-types.h :\
$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-types.py $(qapi-py)
$(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-types.py \
$(gen-out-type) -o tests -p "test-" $<, \
" GEN $@")
tests/test-qapi-visit.c tests/test-qapi-visit.h :\
$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-visit.py $(qapi-py)
$(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-visit.py \
$(gen-out-type) -o tests -p "test-" $<, \
" GEN $@")
tests/test-qmp-commands.h tests/test-qmp-marshal.c :\
$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-commands.py $(qapi-py)
$(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-commands.py \
$(gen-out-type) -o tests -p "test-" $<, \
" GEN $@")
tests/test-qapi-event.c tests/test-qapi-event.h :\
$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-event.py $(qapi-py)
$(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-event.py \
$(gen-out-type) -o tests -p "test-" $<, \
" GEN $@")
tests/test-qmp-introspect.c tests/test-qmp-introspect.h :\
$(SRC_PATH)/tests/qapi-schema/qapi-schema-test.json $(SRC_PATH)/scripts/qapi-introspect.py $(qapi-py)
$(call quiet-command,$(PYTHON) $(SRC_PATH)/scripts/qapi-introspect.py \
$(gen-out-type) -o tests -p "test-" $<, \
" GEN $@")
tests/test-string-output-visitor$(EXESUF): tests/test-string-output-visitor.o $(test-qapi-obj-y)
tests/test-string-input-visitor$(EXESUF): tests/test-string-input-visitor.o $(test-qapi-obj-y)
tests/test-qmp-event$(EXESUF): tests/test-qmp-event.o $(test-qapi-obj-y)
tests/test-qmp-output-visitor$(EXESUF): tests/test-qmp-output-visitor.o $(test-qapi-obj-y)
tests/test-qmp-input-visitor$(EXESUF): tests/test-qmp-input-visitor.o $(test-qapi-obj-y)
tests/test-qmp-input-strict$(EXESUF): tests/test-qmp-input-strict.o $(test-qapi-obj-y)
tests/test-qmp-commands$(EXESUF): tests/test-qmp-commands.o tests/test-qmp-marshal.o $(test-qapi-obj-y)
tests/test-visitor-serialization$(EXESUF): tests/test-visitor-serialization.o $(test-qapi-obj-y)
tests/test-opts-visitor$(EXESUF): tests/test-opts-visitor.o $(test-qapi-obj-y)
tests/test-mul64$(EXESUF): tests/test-mul64.o $(test-util-obj-y)
tests/test-bitops$(EXESUF): tests/test-bitops.o $(test-util-obj-y)
tests/test-crypto-hash$(EXESUF): tests/test-crypto-hash.o $(test-crypto-obj-y)
tests/test-crypto-cipher$(EXESUF): tests/test-crypto-cipher.o $(test-crypto-obj-y)
tests/test-crypto-tlscredsx509$(EXESUF): tests/test-crypto-tlscredsx509.o \
tests/crypto-tls-x509-helpers.o tests/pkix_asn1_tab.o $(test-crypto-obj-y)
tests/test-crypto-tlssession$(EXESUF): tests/test-crypto-tlssession.o \
tests/crypto-tls-x509-helpers.o tests/pkix_asn1_tab.o $(test-crypto-obj-y)
libqos-obj-y = tests/libqos/pci.o tests/libqos/fw_cfg.o tests/libqos/malloc.o
libqos-obj-y += tests/libqos/i2c.o tests/libqos/libqos.o
libqos-pc-obj-y = $(libqos-obj-y) tests/libqos/pci-pc.o
libqos-pc-obj-y += tests/libqos/malloc-pc.o tests/libqos/libqos-pc.o
libqos-pc-obj-y += tests/libqos/ahci.o
libqos-omap-obj-y = $(libqos-obj-y) tests/libqos/i2c-omap.o
libqos-imx-obj-y = $(libqos-obj-y) tests/libqos/i2c-imx.o
libqos-usb-obj-y = $(libqos-pc-obj-y) tests/libqos/usb.o
libqos-virtio-obj-y = $(libqos-pc-obj-y) tests/libqos/virtio.o tests/libqos/virtio-pci.o tests/libqos/virtio-mmio.o tests/libqos/malloc-generic.o
tests/rtc-test$(EXESUF): tests/rtc-test.o
tests/m48t59-test$(EXESUF): tests/m48t59-test.o
tests/endianness-test$(EXESUF): tests/endianness-test.o
tests/spapr-phb-test$(EXESUF): tests/spapr-phb-test.o $(libqos-obj-y)
tests/fdc-test$(EXESUF): tests/fdc-test.o
tests/ide-test$(EXESUF): tests/ide-test.o $(libqos-pc-obj-y)
tests/ahci-test$(EXESUF): tests/ahci-test.o $(libqos-pc-obj-y)
tests/hd-geo-test$(EXESUF): tests/hd-geo-test.o
tests/boot-order-test$(EXESUF): tests/boot-order-test.o $(libqos-obj-y)
tests/bios-tables-test$(EXESUF): tests/bios-tables-test.o $(libqos-obj-y)
tests/tmp105-test$(EXESUF): tests/tmp105-test.o $(libqos-omap-obj-y)
tests/ds1338-test$(EXESUF): tests/ds1338-test.o $(libqos-imx-obj-y)
tests/i440fx-test$(EXESUF): tests/i440fx-test.o $(libqos-pc-obj-y)
tests/q35-test$(EXESUF): tests/q35-test.o $(libqos-pc-obj-y)
tests/fw_cfg-test$(EXESUF): tests/fw_cfg-test.o $(libqos-pc-obj-y)
tests/e1000-test$(EXESUF): tests/e1000-test.o
tests/rtl8139-test$(EXESUF): tests/rtl8139-test.o $(libqos-pc-obj-y)
tests/pcnet-test$(EXESUF): tests/pcnet-test.o
tests/eepro100-test$(EXESUF): tests/eepro100-test.o
tests/vmxnet3-test$(EXESUF): tests/vmxnet3-test.o
tests/ne2000-test$(EXESUF): tests/ne2000-test.o
tests/wdt_ib700-test$(EXESUF): tests/wdt_ib700-test.o
tests/tco-test$(EXESUF): tests/tco-test.o $(libqos-pc-obj-y)
tests/virtio-balloon-test$(EXESUF): tests/virtio-balloon-test.o
tests/virtio-blk-test$(EXESUF): tests/virtio-blk-test.o $(libqos-virtio-obj-y)
tests/virtio-net-test$(EXESUF): tests/virtio-net-test.o $(libqos-pc-obj-y) $(libqos-virtio-obj-y)
tests/virtio-rng-test$(EXESUF): tests/virtio-rng-test.o $(libqos-pc-obj-y)
tests/virtio-scsi-test$(EXESUF): tests/virtio-scsi-test.o $(libqos-virtio-obj-y)
tests/virtio-9p-test$(EXESUF): tests/virtio-9p-test.o
tests/virtio-serial-test$(EXESUF): tests/virtio-serial-test.o
tests/virtio-console-test$(EXESUF): tests/virtio-console-test.o
tests/tpci200-test$(EXESUF): tests/tpci200-test.o
tests/display-vga-test$(EXESUF): tests/display-vga-test.o
tests/ipoctal232-test$(EXESUF): tests/ipoctal232-test.o
tests/qom-test$(EXESUF): tests/qom-test.o
tests/drive_del-test$(EXESUF): tests/drive_del-test.o $(libqos-pc-obj-y)
tests/qdev-monitor-test$(EXESUF): tests/qdev-monitor-test.o $(libqos-pc-obj-y)
tests/nvme-test$(EXESUF): tests/nvme-test.o
tests/pvpanic-test$(EXESUF): tests/pvpanic-test.o
tests/i82801b11-test$(EXESUF): tests/i82801b11-test.o
tests/ac97-test$(EXESUF): tests/ac97-test.o
tests/es1370-test$(EXESUF): tests/es1370-test.o
tests/intel-hda-test$(EXESUF): tests/intel-hda-test.o
tests/ioh3420-test$(EXESUF): tests/ioh3420-test.o
tests/usb-hcd-ohci-test$(EXESUF): tests/usb-hcd-ohci-test.o $(libqos-usb-obj-y)
tests/usb-hcd-uhci-test$(EXESUF): tests/usb-hcd-uhci-test.o $(libqos-usb-obj-y)
tests/usb-hcd-ehci-test$(EXESUF): tests/usb-hcd-ehci-test.o $(libqos-usb-obj-y)
tests/usb-hcd-xhci-test$(EXESUF): tests/usb-hcd-xhci-test.o $(libqos-usb-obj-y)
tests/pc-cpu-test$(EXESUF): tests/pc-cpu-test.o
tests/vhost-user-test$(EXESUF): tests/vhost-user-test.o qemu-char.o qemu-timer.o $(qtest-obj-y)
tests/qemu-iotests/socket_scm_helper$(EXESUF): tests/qemu-iotests/socket_scm_helper.o
tests/test-qemu-opts$(EXESUF): tests/test-qemu-opts.o $(test-util-obj-y)
tests/test-write-threshold$(EXESUF): tests/test-write-threshold.o $(test-block-obj-y)
ifeq ($(CONFIG_POSIX),y)
LIBS += -lutil
endif
LIBS += $(TEST_LIBS)
CFLAGS += $(TEST_CFLAGS)
# QTest rules
TARGETS=$(patsubst %-softmmu,%, $(filter %-softmmu,$(TARGET_DIRS)))
ifeq ($(CONFIG_POSIX),y)
QTEST_TARGETS=$(foreach TARGET,$(TARGETS), $(if $(check-qtest-$(TARGET)-y), $(TARGET),))
check-qtest-y=$(foreach TARGET,$(TARGETS), $(check-qtest-$(TARGET)-y))
endif
qtest-obj-y = tests/libqtest.o $(test-util-obj-y)
$(check-qtest-y): $(qtest-obj-y)
.PHONY: check-help
check-help:
@echo "Regression testing targets:"
@echo
@echo " make check Run all tests"
@echo " make check-qtest-TARGET Run qtest tests for given target"
@echo " make check-qtest Run qtest tests"
@echo " make check-unit Run qobject tests"
@echo " make check-qapi-schema Run QAPI schema tests"
@echo " make check-block Run block tests"
@echo " make check-report.html Generates an HTML test report"
@echo " make check-clean Clean the tests"
@echo
@echo "Please note that HTML reports do not regenerate if the unit tests"
@echo "has not changed."
@echo
@echo "The variable SPEED can be set to control the gtester speed setting."
@echo "Default options are -k and (for make V=1) --verbose; they can be"
@echo "changed with variable GTESTER_OPTIONS."
SPEED = quick
GTESTER_OPTIONS = -k $(if $(V),--verbose,-q)
GCOV_OPTIONS = -n $(if $(V),-f,)
# gtester tests, possibly with verbose output
.PHONY: $(patsubst %, check-qtest-%, $(QTEST_TARGETS))
$(patsubst %, check-qtest-%, $(QTEST_TARGETS)): check-qtest-%: $(check-qtest-y)
$(if $(CONFIG_GCOV),@rm -f *.gcda */*.gcda */*/*.gcda */*/*/*.gcda,)
$(call quiet-command,QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \
QTEST_QEMU_IMG=qemu-img$(EXESUF) \
MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$((RANDOM % 255 + 1))} \
gtester $(GTESTER_OPTIONS) -m=$(SPEED) $(check-qtest-$*-y),"GTESTER $@")
$(if $(CONFIG_GCOV),@for f in $(gcov-files-$*-y); do \
echo Gcov report for $$f:;\
$(GCOV) $(GCOV_OPTIONS) $$f -o `dirname $$f`; \
done,)
.PHONY: $(patsubst %, check-%, $(check-unit-y))
$(patsubst %, check-%, $(check-unit-y)): check-%: %
$(if $(CONFIG_GCOV),@rm -f *.gcda */*.gcda */*/*.gcda */*/*/*.gcda,)
$(call quiet-command, \
MALLOC_PERTURB_=$${MALLOC_PERTURB_:-$$((RANDOM % 255 + 1))} \
gtester $(GTESTER_OPTIONS) -m=$(SPEED) $*,"GTESTER $*")
$(if $(CONFIG_GCOV),@for f in $(gcov-files-$(subst tests/,,$*)-y); do \
echo Gcov report for $$f:;\
$(GCOV) $(GCOV_OPTIONS) $$f -o `dirname $$f`; \
done,)
# gtester tests with XML output
$(patsubst %, check-report-qtest-%.xml, $(QTEST_TARGETS)): check-report-qtest-%.xml: $(check-qtest-y)
$(call quiet-command,QTEST_QEMU_BINARY=$*-softmmu/qemu-system-$* \
QTEST_QEMU_IMG=qemu-img$(EXESUF) \
gtester -q $(GTESTER_OPTIONS) -o $@ -m=$(SPEED) $(check-qtest-$*-y),"GTESTER $@")
check-report-unit.xml: $(check-unit-y)
$(call quiet-command,gtester -q $(GTESTER_OPTIONS) -o $@ -m=$(SPEED) $^, "GTESTER $@")
# Reports and overall runs
check-report.xml: $(patsubst %,check-report-qtest-%.xml, $(QTEST_TARGETS)) check-report-unit.xml
$(call quiet-command,$(SRC_PATH)/scripts/gtester-cat $^ > $@, " GEN $@")
check-report.html: check-report.xml
$(call quiet-command,gtester-report $< > $@, " GEN $@")
# Other tests
QEMU_IOTESTS_HELPERS-$(CONFIG_LINUX) = tests/qemu-iotests/socket_scm_helper$(EXESUF)
.PHONY: check-tests/qemu-iotests-quick.sh
check-tests/qemu-iotests-quick.sh: tests/qemu-iotests-quick.sh qemu-img$(EXESUF) qemu-io$(EXESUF) $(QEMU_IOTESTS_HELPERS-y)
$<
.PHONY: check-tests/test-qapi.py
check-tests/test-qapi.py: tests/test-qapi.py
.PHONY: $(patsubst %, check-%, $(check-qapi-schema-y))
$(patsubst %, check-%, $(check-qapi-schema-y)): check-%.json: $(SRC_PATH)/%.json
$(call quiet-command, PYTHONPATH=$(SRC_PATH)/scripts \
$(PYTHON) $(SRC_PATH)/tests/qapi-schema/test-qapi.py \
$^ >$*.test.out 2>$*.test.err; \
echo $$? >$*.test.exit, \
" TEST $*.out")
@diff -q $(SRC_PATH)/$*.out $*.test.out
@# Sanitize error messages (make them independent of build directory)
@perl -p -e 's|\Q$(SRC_PATH)\E/||g' $*.test.err | diff -q $(SRC_PATH)/$*.err -
@diff -q $(SRC_PATH)/$*.exit $*.test.exit
# Consolidated targets
.PHONY: check-qapi-schema check-qtest check-unit check check-clean
check-qapi-schema: $(patsubst %,check-%, $(check-qapi-schema-y))
check-qtest: $(patsubst %,check-qtest-%, $(QTEST_TARGETS))
check-unit: $(patsubst %,check-%, $(check-unit-y))
check-block: $(patsubst %,check-%, $(check-block-y))
check: check-qapi-schema check-unit check-qtest
check-clean:
$(MAKE) -C tests/tcg clean
rm -rf $(check-unit-y) tests/*.o $(QEMU_IOTESTS_HELPERS-y)
rm -rf $(sort $(foreach target,$(SYSEMU_TARGET_LIST), $(check-qtest-$(target)-y)))
clean: check-clean
# Build the help program automatically
all: $(QEMU_IOTESTS_HELPERS-y)
-include $(wildcard tests/*.d)
-include $(wildcard tests/libqos/*.d)

925
tests/bios-tables-test.c.orig Normal file
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@ -0,0 +1,925 @@
/*
* Boot order test cases.
*
* Copyright (c) 2013 Red Hat Inc.
*
* Authors:
* Michael S. Tsirkin <mst@redhat.com>,
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
*/
#include "qemu/osdep.h"
#include <glib/gstdio.h>
#include "qemu-common.h"
#include "hw/firmware/smbios.h"
#include "qemu/bitmap.h"
#include "acpi-utils.h"
#include "boot-sector.h"
#define MACHINE_PC "pc"
#define MACHINE_Q35 "q35"
#define ACPI_REBUILD_EXPECTED_AML "TEST_ACPI_REBUILD_AML"
typedef struct {
const char *machine;
const char *variant;
uint32_t rsdp_addr;
uint8_t rsdp_table[36 /* ACPI 2.0+ RSDP size */];
AcpiRsdtDescriptorRev1 rsdt_table;
uint32_t dsdt_addr;
uint32_t facs_addr;
AcpiFacsDescriptorRev1 facs_table;
uint32_t *rsdt_tables_addr;
int rsdt_tables_nr;
GArray *tables;
uint32_t smbios_ep_addr;
struct smbios_21_entry_point smbios_ep_table;
uint8_t *required_struct_types;
int required_struct_types_len;
QTestState *qts;
} test_data;
static char disk[] = "tests/acpi-test-disk-XXXXXX";
static const char *data_dir = "tests/data/acpi";
#ifdef CONFIG_IASL
static const char *iasl = stringify(CONFIG_IASL);
#else
static const char *iasl;
#endif
static void free_test_data(test_data *data)
{
AcpiSdtTable *temp;
int i;
g_free(data->rsdt_tables_addr);
for (i = 0; i < data->tables->len; ++i) {
temp = &g_array_index(data->tables, AcpiSdtTable, i);
g_free(temp->aml);
if (temp->aml_file &&
!temp->tmp_files_retain &&
g_strstr_len(temp->aml_file, -1, "aml-")) {
unlink(temp->aml_file);
}
g_free(temp->aml_file);
g_free(temp->asl);
if (temp->asl_file &&
!temp->tmp_files_retain) {
unlink(temp->asl_file);
}
g_free(temp->asl_file);
}
g_array_free(data->tables, true);
}
static void test_acpi_rsdp_address(test_data *data)
{
uint32_t off = acpi_find_rsdp_address(data->qts);
g_assert_cmphex(off, <, 0x100000);
data->rsdp_addr = off;
}
static void test_acpi_rsdp_table(test_data *data)
{
uint8_t *rsdp_table = data->rsdp_table, revision;
uint32_t addr = data->rsdp_addr;
acpi_parse_rsdp_table(data->qts, addr, rsdp_table);
revision = rsdp_table[15 /* Revision offset */];
switch (revision) {
case 0: /* ACPI 1.0 RSDP */
/* With rev 1, checksum is only for the first 20 bytes */
g_assert(!acpi_calc_checksum(rsdp_table, 20));
break;
case 2: /* ACPI 2.0+ RSDP */
/* With revision 2, we have 2 checksums */
g_assert(!acpi_calc_checksum(rsdp_table, 20));
g_assert(!acpi_calc_checksum(rsdp_table, 36));
break;
default:
g_assert_not_reached();
}
}
static void test_acpi_rsdt_table(test_data *data)
{
AcpiRsdtDescriptorRev1 *rsdt_table = &data->rsdt_table;
uint32_t addr = acpi_get_rsdt_address(data->rsdp_table);
uint32_t *tables;
int tables_nr;
uint8_t checksum;
uint32_t rsdt_table_length;
/* read the header */
ACPI_READ_TABLE_HEADER(data->qts, rsdt_table, addr);
ACPI_ASSERT_CMP(rsdt_table->signature, "RSDT");
rsdt_table_length = le32_to_cpu(rsdt_table->length);
/* compute the table entries in rsdt */
tables_nr = (rsdt_table_length - sizeof(AcpiRsdtDescriptorRev1)) /
sizeof(uint32_t);
g_assert(tables_nr > 0);
/* get the addresses of the tables pointed by rsdt */
tables = g_new0(uint32_t, tables_nr);
ACPI_READ_ARRAY_PTR(data->qts, tables, tables_nr, addr);
checksum = acpi_calc_checksum((uint8_t *)rsdt_table, rsdt_table_length) +
acpi_calc_checksum((uint8_t *)tables,
tables_nr * sizeof(uint32_t));
g_assert(!checksum);
/* SSDT tables after FADT */
data->rsdt_tables_addr = tables;
data->rsdt_tables_nr = tables_nr;
}
static void fadt_fetch_facs_and_dsdt_ptrs(test_data *data)
{
uint32_t addr;
AcpiTableHeader hdr;
/* FADT table comes first */
addr = le32_to_cpu(data->rsdt_tables_addr[0]);
ACPI_READ_TABLE_HEADER(data->qts, &hdr, addr);
ACPI_ASSERT_CMP(hdr.signature, "FACP");
ACPI_READ_FIELD(data->qts, data->facs_addr, addr);
ACPI_READ_FIELD(data->qts, data->dsdt_addr, addr);
}
static void sanitize_fadt_ptrs(test_data *data)
{
/* fixup pointers in FADT */
int i;
for (i = 0; i < data->tables->len; i++) {
AcpiSdtTable *sdt = &g_array_index(data->tables, AcpiSdtTable, i);
if (memcmp(&sdt->header.signature, "FACP", 4)) {
continue;
}
/* check original FADT checksum before sanitizing table */
g_assert(!(uint8_t)(
acpi_calc_checksum((uint8_t *)sdt, sizeof(AcpiTableHeader)) +
acpi_calc_checksum((uint8_t *)sdt->aml, sdt->aml_len)
));
/* sdt->aml field offset := spec offset - header size */
memset(sdt->aml + 0, 0, 4); /* sanitize FIRMWARE_CTRL(36) ptr */
memset(sdt->aml + 4, 0, 4); /* sanitize DSDT(40) ptr */
if (sdt->header.revision >= 3) {
memset(sdt->aml + 96, 0, 8); /* sanitize X_FIRMWARE_CTRL(132) ptr */
memset(sdt->aml + 104, 0, 8); /* sanitize X_DSDT(140) ptr */
}
/* update checksum */
sdt->header.checksum = 0;
sdt->header.checksum -=
acpi_calc_checksum((uint8_t *)sdt, sizeof(AcpiTableHeader)) +
acpi_calc_checksum((uint8_t *)sdt->aml, sdt->aml_len);
break;
}
}
static void test_acpi_facs_table(test_data *data)
{
AcpiFacsDescriptorRev1 *facs_table = &data->facs_table;
uint32_t addr = le32_to_cpu(data->facs_addr);
ACPI_READ_FIELD(data->qts, facs_table->signature, addr);
ACPI_READ_FIELD(data->qts, facs_table->length, addr);
ACPI_READ_FIELD(data->qts, facs_table->hardware_signature, addr);
ACPI_READ_FIELD(data->qts, facs_table->firmware_waking_vector, addr);
ACPI_READ_FIELD(data->qts, facs_table->global_lock, addr);
ACPI_READ_FIELD(data->qts, facs_table->flags, addr);
ACPI_READ_ARRAY(data->qts, facs_table->resverved3, addr);
ACPI_ASSERT_CMP(facs_table->signature, "FACS");
}
/** fetch_table
* load ACPI table at @addr into table descriptor @sdt_table
* and check that header checksum matches actual one.
*/
static void fetch_table(QTestState *qts, AcpiSdtTable *sdt_table, uint32_t addr)
{
uint8_t checksum;
memset(sdt_table, 0, sizeof(*sdt_table));
ACPI_READ_TABLE_HEADER(qts, &sdt_table->header, addr);
sdt_table->aml_len = le32_to_cpu(sdt_table->header.length)
- sizeof(AcpiTableHeader);
sdt_table->aml = g_malloc0(sdt_table->aml_len);
ACPI_READ_ARRAY_PTR(qts, sdt_table->aml, sdt_table->aml_len, addr);
checksum = acpi_calc_checksum((uint8_t *)sdt_table,
sizeof(AcpiTableHeader)) +
acpi_calc_checksum((uint8_t *)sdt_table->aml,
sdt_table->aml_len);
g_assert(!checksum);
}
static void test_acpi_dsdt_table(test_data *data)
{
AcpiSdtTable dsdt_table;
uint32_t addr = le32_to_cpu(data->dsdt_addr);
fetch_table(data->qts, &dsdt_table, addr);
ACPI_ASSERT_CMP(dsdt_table.header.signature, "DSDT");
/* Since DSDT isn't in RSDT, add DSDT to ASL test tables list manually */
g_array_append_val(data->tables, dsdt_table);
}
/* Load all tables and add to test list directly RSDT referenced tables */
static void fetch_rsdt_referenced_tables(test_data *data)
{
int tables_nr = data->rsdt_tables_nr;
int i;
for (i = 0; i < tables_nr; i++) {
AcpiSdtTable ssdt_table;
uint32_t addr;
addr = le32_to_cpu(data->rsdt_tables_addr[i]);
fetch_table(data->qts, &ssdt_table, addr);
/* Add table to ASL test tables list */
g_array_append_val(data->tables, ssdt_table);
}
}
static void dump_aml_files(test_data *data, bool rebuild)
{
AcpiSdtTable *sdt;
GError *error = NULL;
gchar *aml_file = NULL;
gint fd;
ssize_t ret;
int i;
for (i = 0; i < data->tables->len; ++i) {
const char *ext = data->variant ? data->variant : "";
sdt = &g_array_index(data->tables, AcpiSdtTable, i);
g_assert(sdt->aml);
if (rebuild) {
aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine,
(gchar *)&sdt->header.signature, ext);
fd = g_open(aml_file, O_WRONLY|O_TRUNC|O_CREAT,
S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH);
} else {
fd = g_file_open_tmp("aml-XXXXXX", &sdt->aml_file, &error);
g_assert_no_error(error);
}
g_assert(fd >= 0);
ret = qemu_write_full(fd, sdt, sizeof(AcpiTableHeader));
g_assert(ret == sizeof(AcpiTableHeader));
ret = qemu_write_full(fd, sdt->aml, sdt->aml_len);
g_assert(ret == sdt->aml_len);
close(fd);
g_free(aml_file);
}
}
static bool compare_signature(AcpiSdtTable *sdt, const char *signature)
{
return !memcmp(&sdt->header.signature, signature, 4);
}
static bool load_asl(GArray *sdts, AcpiSdtTable *sdt)
{
AcpiSdtTable *temp;
GError *error = NULL;
GString *command_line = g_string_new(iasl);
gint fd;
gchar *out, *out_err;
gboolean ret;
int i;
fd = g_file_open_tmp("asl-XXXXXX.dsl", &sdt->asl_file, &error);
g_assert_no_error(error);
close(fd);
/* build command line */
g_string_append_printf(command_line, " -p %s ", sdt->asl_file);
if (compare_signature(sdt, "DSDT") ||
compare_signature(sdt, "SSDT")) {
for (i = 0; i < sdts->len; ++i) {
temp = &g_array_index(sdts, AcpiSdtTable, i);
if (compare_signature(temp, "DSDT") ||
compare_signature(temp, "SSDT")) {
g_string_append_printf(command_line, "-e %s ", temp->aml_file);
}
}
}
g_string_append_printf(command_line, "-d %s", sdt->aml_file);
/* pass 'out' and 'out_err' in order to be redirected */
ret = g_spawn_command_line_sync(command_line->str, &out, &out_err, NULL, &error);
g_assert_no_error(error);
if (ret) {
ret = g_file_get_contents(sdt->asl_file, &sdt->asl,
&sdt->asl_len, &error);
g_assert(ret);
g_assert_no_error(error);
ret = (sdt->asl_len > 0);
}
g_free(out);
g_free(out_err);
g_string_free(command_line, true);
return !ret;
}
#define COMMENT_END "*/"
#define DEF_BLOCK "DefinitionBlock ("
#define BLOCK_NAME_END ","
static GString *normalize_asl(gchar *asl_code)
{
GString *asl = g_string_new(asl_code);
gchar *comment, *block_name;
/* strip comments (different generation days) */
comment = g_strstr_len(asl->str, asl->len, COMMENT_END);
if (comment) {
comment += strlen(COMMENT_END);
while (*comment == '\n') {
comment++;
}
asl = g_string_erase(asl, 0, comment - asl->str);
}
/* strip def block name (it has file path in it) */
if (g_str_has_prefix(asl->str, DEF_BLOCK)) {
block_name = g_strstr_len(asl->str, asl->len, BLOCK_NAME_END);
g_assert(block_name);
asl = g_string_erase(asl, 0,
block_name + sizeof(BLOCK_NAME_END) - asl->str);
}
return asl;
}
static GArray *load_expected_aml(test_data *data)
{
int i;
AcpiSdtTable *sdt;
GError *error = NULL;
gboolean ret;
GArray *exp_tables = g_array_new(false, true, sizeof(AcpiSdtTable));
if (getenv("V")) {
fputc('\n', stderr);
}
for (i = 0; i < data->tables->len; ++i) {
AcpiSdtTable exp_sdt;
gchar *aml_file = NULL;
const char *ext = data->variant ? data->variant : "";
sdt = &g_array_index(data->tables, AcpiSdtTable, i);
memset(&exp_sdt, 0, sizeof(exp_sdt));
exp_sdt.header.signature = sdt->header.signature;
try_again:
aml_file = g_strdup_printf("%s/%s/%.4s%s", data_dir, data->machine,
(gchar *)&sdt->header.signature, ext);
if (getenv("V")) {
fprintf(stderr, "Looking for expected file '%s'\n", aml_file);
}
if (g_file_test(aml_file, G_FILE_TEST_EXISTS)) {
exp_sdt.aml_file = aml_file;
} else if (*ext != '\0') {
/* try fallback to generic (extension less) expected file */
ext = "";
g_free(aml_file);
goto try_again;
}
g_assert(exp_sdt.aml_file);
if (getenv("V")) {
fprintf(stderr, "Using expected file '%s'\n", aml_file);
}
ret = g_file_get_contents(aml_file, &exp_sdt.aml,
&exp_sdt.aml_len, &error);
g_assert(ret);
g_assert_no_error(error);
g_assert(exp_sdt.aml);
g_assert(exp_sdt.aml_len);
g_array_append_val(exp_tables, exp_sdt);
}
return exp_tables;
}
/* test the list of tables in @data->tables against reference tables */
static void test_acpi_asl(test_data *data)
{
int i;
AcpiSdtTable *sdt, *exp_sdt;
test_data exp_data;
gboolean exp_err, err;
memset(&exp_data, 0, sizeof(exp_data));
exp_data.tables = load_expected_aml(data);
dump_aml_files(data, false);
for (i = 0; i < data->tables->len; ++i) {
GString *asl, *exp_asl;
sdt = &g_array_index(data->tables, AcpiSdtTable, i);
exp_sdt = &g_array_index(exp_data.tables, AcpiSdtTable, i);
err = load_asl(data->tables, sdt);
asl = normalize_asl(sdt->asl);
exp_err = load_asl(exp_data.tables, exp_sdt);
exp_asl = normalize_asl(exp_sdt->asl);
/* TODO: check for warnings */
g_assert(!err || exp_err);
if (g_strcmp0(asl->str, exp_asl->str)) {
if (exp_err) {
fprintf(stderr,
"Warning! iasl couldn't parse the expected aml\n");
} else {
uint32_t signature = cpu_to_le32(exp_sdt->header.signature);
sdt->tmp_files_retain = true;
exp_sdt->tmp_files_retain = true;
fprintf(stderr,
"acpi-test: Warning! %.4s mismatch. "
"Actual [asl:%s, aml:%s], Expected [asl:%s, aml:%s].\n",
(gchar *)&signature,
sdt->asl_file, sdt->aml_file,
exp_sdt->asl_file, exp_sdt->aml_file);
if (getenv("V")) {
const char *diff_cmd = getenv("DIFF");
if (diff_cmd) {
int ret G_GNUC_UNUSED;
char *diff = g_strdup_printf("%s %s %s", diff_cmd,
exp_sdt->asl_file, sdt->asl_file);
ret = system(diff) ;
g_free(diff);
} else {
fprintf(stderr, "acpi-test: Warning. not showing "
"difference since no diff utility is specified. "
"Set 'DIFF' environment variable to a preferred "
"diff utility and run 'make V=1 check' again to "
"see ASL difference.");
}
}
}
}
g_string_free(asl, true);
g_string_free(exp_asl, true);
}
free_test_data(&exp_data);
}
static bool smbios_ep_table_ok(test_data *data)
{
struct smbios_21_entry_point *ep_table = &data->smbios_ep_table;
uint32_t addr = data->smbios_ep_addr;
ACPI_READ_ARRAY(data->qts, ep_table->anchor_string, addr);
if (memcmp(ep_table->anchor_string, "_SM_", 4)) {
return false;
}
ACPI_READ_FIELD(data->qts, ep_table->checksum, addr);
ACPI_READ_FIELD(data->qts, ep_table->length, addr);
ACPI_READ_FIELD(data->qts, ep_table->smbios_major_version, addr);
ACPI_READ_FIELD(data->qts, ep_table->smbios_minor_version, addr);
ACPI_READ_FIELD(data->qts, ep_table->max_structure_size, addr);
ACPI_READ_FIELD(data->qts, ep_table->entry_point_revision, addr);
ACPI_READ_ARRAY(data->qts, ep_table->formatted_area, addr);
ACPI_READ_ARRAY(data->qts, ep_table->intermediate_anchor_string, addr);
if (memcmp(ep_table->intermediate_anchor_string, "_DMI_", 5)) {
return false;
}
ACPI_READ_FIELD(data->qts, ep_table->intermediate_checksum, addr);
ACPI_READ_FIELD(data->qts, ep_table->structure_table_length, addr);
if (ep_table->structure_table_length == 0) {
return false;
}
ACPI_READ_FIELD(data->qts, ep_table->structure_table_address, addr);
ACPI_READ_FIELD(data->qts, ep_table->number_of_structures, addr);
if (ep_table->number_of_structures == 0) {
return false;
}
ACPI_READ_FIELD(data->qts, ep_table->smbios_bcd_revision, addr);
if (acpi_calc_checksum((uint8_t *)ep_table, sizeof *ep_table) ||
acpi_calc_checksum((uint8_t *)ep_table + 0x10,
sizeof *ep_table - 0x10)) {
return false;
}
return true;
}
static void test_smbios_entry_point(test_data *data)
{
uint32_t off;
/* find smbios entry point structure */
for (off = 0xf0000; off < 0x100000; off += 0x10) {
uint8_t sig[] = "_SM_";
int i;
for (i = 0; i < sizeof sig - 1; ++i) {
sig[i] = qtest_readb(data->qts, off + i);
}
if (!memcmp(sig, "_SM_", sizeof sig)) {
/* signature match, but is this a valid entry point? */
data->smbios_ep_addr = off;
if (smbios_ep_table_ok(data)) {
break;
}
}
}
g_assert_cmphex(off, <, 0x100000);
}
static inline bool smbios_single_instance(uint8_t type)
{
switch (type) {
case 0:
case 1:
case 2:
case 3:
case 16:
case 32:
case 127:
return true;
default:
return false;
}
}
static void test_smbios_structs(test_data *data)
{
DECLARE_BITMAP(struct_bitmap, SMBIOS_MAX_TYPE+1) = { 0 };
struct smbios_21_entry_point *ep_table = &data->smbios_ep_table;
uint32_t addr = le32_to_cpu(ep_table->structure_table_address);
int i, len, max_len = 0;
uint8_t type, prv, crt;
/* walk the smbios tables */
for (i = 0; i < le16_to_cpu(ep_table->number_of_structures); i++) {
/* grab type and formatted area length from struct header */
type = qtest_readb(data->qts, addr);
g_assert_cmpuint(type, <=, SMBIOS_MAX_TYPE);
len = qtest_readb(data->qts, addr + 1);
/* single-instance structs must not have been encountered before */
if (smbios_single_instance(type)) {
g_assert(!test_bit(type, struct_bitmap));
}
set_bit(type, struct_bitmap);
/* seek to end of unformatted string area of this struct ("\0\0") */
prv = crt = 1;
while (prv || crt) {
prv = crt;
crt = qtest_readb(data->qts, addr + len);
len++;
}
/* keep track of max. struct size */
if (max_len < len) {
max_len = len;
g_assert_cmpuint(max_len, <=, ep_table->max_structure_size);
}
/* start of next structure */
addr += len;
}
/* total table length and max struct size must match entry point values */
g_assert_cmpuint(le16_to_cpu(ep_table->structure_table_length), ==,
addr - le32_to_cpu(ep_table->structure_table_address));
g_assert_cmpuint(le16_to_cpu(ep_table->max_structure_size), ==, max_len);
/* required struct types must all be present */
for (i = 0; i < data->required_struct_types_len; i++) {
g_assert(test_bit(data->required_struct_types[i], struct_bitmap));
}
}
static void test_acpi_one(const char *params, test_data *data)
{
char *args;
/* Disable kernel irqchip to be able to override apic irq0. */
args = g_strdup_printf("-machine %s,accel=%s,kernel-irqchip=off "
"-net none -display none %s "
"-drive id=hd0,if=none,file=%s,format=raw "
"-device ide-hd,drive=hd0 ",
data->machine, "kvm:tcg",
params ? params : "", disk);
data->qts = qtest_init(args);
boot_sector_test(data->qts);
data->tables = g_array_new(false, true, sizeof(AcpiSdtTable));
test_acpi_rsdp_address(data);
test_acpi_rsdp_table(data);
test_acpi_rsdt_table(data);
fadt_fetch_facs_and_dsdt_ptrs(data);
test_acpi_facs_table(data);
test_acpi_dsdt_table(data);
fetch_rsdt_referenced_tables(data);
sanitize_fadt_ptrs(data);
if (iasl) {
if (getenv(ACPI_REBUILD_EXPECTED_AML)) {
dump_aml_files(data, true);
} else {
test_acpi_asl(data);
}
}
test_smbios_entry_point(data);
test_smbios_structs(data);
assert(!global_qtest);
qtest_quit(data->qts);
g_free(args);
}
static uint8_t base_required_struct_types[] = {
0, 1, 3, 4, 16, 17, 19, 32, 127
};
static void test_acpi_piix4_tcg(void)
{
test_data data;
/* Supplying -machine accel argument overrides the default (qtest).
* This is to make guest actually run.
*/
memset(&data, 0, sizeof(data));
data.machine = MACHINE_PC;
data.required_struct_types = base_required_struct_types;
data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types);
test_acpi_one(NULL, &data);
free_test_data(&data);
}
static void test_acpi_piix4_tcg_bridge(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_PC;
data.variant = ".bridge";
data.required_struct_types = base_required_struct_types;
data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types);
test_acpi_one("-device pci-bridge,chassis_nr=1", &data);
free_test_data(&data);
}
static void test_acpi_q35_tcg(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_Q35;
data.required_struct_types = base_required_struct_types;
data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types);
test_acpi_one(NULL, &data);
free_test_data(&data);
}
static void test_acpi_q35_tcg_bridge(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_Q35;
data.variant = ".bridge";
data.required_struct_types = base_required_struct_types;
data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types);
test_acpi_one("-device pci-bridge,chassis_nr=1",
&data);
free_test_data(&data);
}
static void test_acpi_q35_tcg_mmio64(void)
{
test_data data = {
.machine = MACHINE_Q35,
.variant = ".mmio64",
.required_struct_types = base_required_struct_types,
.required_struct_types_len = ARRAY_SIZE(base_required_struct_types)
};
test_acpi_one("-m 128M,slots=1,maxmem=2G "
"-device pci-testdev,membar=2G",
&data);
free_test_data(&data);
}
static void test_acpi_piix4_tcg_cphp(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_PC;
data.variant = ".cphp";
test_acpi_one("-smp 2,cores=3,sockets=2,maxcpus=6"
" -numa node -numa node"
" -numa dist,src=0,dst=1,val=21",
&data);
free_test_data(&data);
}
static void test_acpi_q35_tcg_cphp(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_Q35;
data.variant = ".cphp";
test_acpi_one(" -smp 2,cores=3,sockets=2,maxcpus=6"
" -numa node -numa node"
" -numa dist,src=0,dst=1,val=21",
&data);
free_test_data(&data);
}
static uint8_t ipmi_required_struct_types[] = {
0, 1, 3, 4, 16, 17, 19, 32, 38, 127
};
static void test_acpi_q35_tcg_ipmi(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_Q35;
data.variant = ".ipmibt";
data.required_struct_types = ipmi_required_struct_types;
data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types);
test_acpi_one("-device ipmi-bmc-sim,id=bmc0"
" -device isa-ipmi-bt,bmc=bmc0",
&data);
free_test_data(&data);
}
static void test_acpi_piix4_tcg_ipmi(void)
{
test_data data;
/* Supplying -machine accel argument overrides the default (qtest).
* This is to make guest actually run.
*/
memset(&data, 0, sizeof(data));
data.machine = MACHINE_PC;
data.variant = ".ipmikcs";
data.required_struct_types = ipmi_required_struct_types;
data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types);
test_acpi_one("-device ipmi-bmc-sim,id=bmc0"
" -device isa-ipmi-kcs,irq=0,bmc=bmc0",
&data);
free_test_data(&data);
}
static void test_acpi_q35_tcg_memhp(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_Q35;
data.variant = ".memhp";
test_acpi_one(" -m 128,slots=3,maxmem=1G"
" -numa node -numa node"
" -numa dist,src=0,dst=1,val=21",
&data);
free_test_data(&data);
}
static void test_acpi_piix4_tcg_memhp(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_PC;
data.variant = ".memhp";
test_acpi_one(" -m 128,slots=3,maxmem=1G"
" -numa node -numa node"
" -numa dist,src=0,dst=1,val=21",
&data);
free_test_data(&data);
}
static void test_acpi_q35_tcg_numamem(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_Q35;
data.variant = ".numamem";
test_acpi_one(" -numa node -numa node,mem=128", &data);
free_test_data(&data);
}
static void test_acpi_piix4_tcg_numamem(void)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = MACHINE_PC;
data.variant = ".numamem";
test_acpi_one(" -numa node -numa node,mem=128", &data);
free_test_data(&data);
}
static void test_acpi_tcg_dimm_pxm(const char *machine)
{
test_data data;
memset(&data, 0, sizeof(data));
data.machine = machine;
data.variant = ".dimmpxm";
test_acpi_one(" -machine nvdimm=on,nvdimm-persistence=cpu"
" -smp 4,sockets=4"
" -m 128M,slots=3,maxmem=1G"
" -numa node,mem=32M,nodeid=0"
" -numa node,mem=32M,nodeid=1"
" -numa node,mem=32M,nodeid=2"
" -numa node,mem=32M,nodeid=3"
" -numa cpu,node-id=0,socket-id=0"
" -numa cpu,node-id=1,socket-id=1"
" -numa cpu,node-id=2,socket-id=2"
" -numa cpu,node-id=3,socket-id=3"
" -object memory-backend-ram,id=ram0,size=128M"
" -object memory-backend-ram,id=nvm0,size=128M"
" -device pc-dimm,id=dimm0,memdev=ram0,node=1"
" -device nvdimm,id=dimm1,memdev=nvm0,node=2",
&data);
free_test_data(&data);
}
static void test_acpi_q35_tcg_dimm_pxm(void)
{
test_acpi_tcg_dimm_pxm(MACHINE_Q35);
}
static void test_acpi_piix4_tcg_dimm_pxm(void)
{
test_acpi_tcg_dimm_pxm(MACHINE_PC);
}
int main(int argc, char *argv[])
{
const char *arch = qtest_get_arch();
int ret;
ret = boot_sector_init(disk);
if(ret)
return ret;
g_test_init(&argc, &argv, NULL);
if (strcmp(arch, "i386") == 0 || strcmp(arch, "x86_64") == 0) {
qtest_add_func("acpi/piix4", test_acpi_piix4_tcg);
qtest_add_func("acpi/piix4/bridge", test_acpi_piix4_tcg_bridge);
qtest_add_func("acpi/q35", test_acpi_q35_tcg);
qtest_add_func("acpi/q35/bridge", test_acpi_q35_tcg_bridge);
qtest_add_func("acpi/q35/mmio64", test_acpi_q35_tcg_mmio64);
qtest_add_func("acpi/piix4/ipmi", test_acpi_piix4_tcg_ipmi);
qtest_add_func("acpi/q35/ipmi", test_acpi_q35_tcg_ipmi);
qtest_add_func("acpi/piix4/cpuhp", test_acpi_piix4_tcg_cphp);
qtest_add_func("acpi/q35/cpuhp", test_acpi_q35_tcg_cphp);
qtest_add_func("acpi/piix4/memhp", test_acpi_piix4_tcg_memhp);
qtest_add_func("acpi/q35/memhp", test_acpi_q35_tcg_memhp);
qtest_add_func("acpi/piix4/numamem", test_acpi_piix4_tcg_numamem);
qtest_add_func("acpi/q35/numamem", test_acpi_q35_tcg_numamem);
qtest_add_func("acpi/piix4/dimmpxm", test_acpi_piix4_tcg_dimm_pxm);
qtest_add_func("acpi/q35/dimmpxm", test_acpi_q35_tcg_dimm_pxm);
}
ret = g_test_run();
boot_sector_cleanup(disk);
return ret;
}

0
tests/data/acpi/diff-aml.sh Normal file
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#!/usr/bin/python
import os, re
root = "tests/data/acpi"
for machine in os.listdir(root):
machine_root = os.path.join(root, machine)
if not os.path.isdir(machine_root):
continue
files = os.listdir(machine_root):
for file in files:
if file.endswith(".dsl"):
continue
extension_prefix = "^[^.]*\."
if re.match(extension_prefix, file):
variant = re.sub(extension_prefix, "", file)
for dirpath, dirnames, filenames in os.walk("tests/data/acpi"):
for file in files:
if file.endswith(".txt"):
print(os.path.join(root, file))

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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/microvm/APIC, Mon Sep 28 17:24:38 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000046
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : D7
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
[040h 0064 1] Subtable Type : 04 [Local APIC NMI]
[041h 0065 1] Length : 06
[042h 0066 1] Processor ID : FF
[043h 0067 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[045h 0069 1] Interrupt Input LINT : 01
Raw Table Data: Length 70 (0x46)
0000: 41 50 49 43 46 00 00 00 01 D7 42 4F 43 48 53 20 // APICF.....BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................
0040: 04 06 FF 00 00 01 // ......

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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of tests/data/acpi/microvm/DSDT, Mon Sep 28 17:24:38 2020
*
* Original Table Header:
* Signature "DSDT"
* Length 0x0000016D (365)
* Revision 0x02
* Checksum 0x62
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (_SB)
{
Device (FWCF)
{
Name (_HID, "QEMU0002") // _HID: Hardware ID
Name (_STA, 0x0B) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0510, // Range Minimum
0x0510, // Range Maximum
0x01, // Alignment
0x0C, // Length
)
})
}
Device (COM1)
{
Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (_STA, 0x0F) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x03F8, // Range Minimum
0x03F8, // Range Maximum
0x00, // Alignment
0x08, // Length
)
IRQNoFlags ()
{4}
})
}
Device (GED)
{
Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID
Name (_UID, "GED") // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
{
0x00000009,
}
})
OperationRegion (EREG, SystemMemory, 0xFEA00000, 0x04)
Field (EREG, DWordAcc, NoLock, WriteAsZeros)
{
ESEL, 32
}
Method (_EVT, 1, Serialized) // _EVT: Event
{
Local0 = ESEL /* \_SB_.GED_.ESEL */
If (((Local0 & 0x02) == 0x02))
{
Notify (PWRB, 0x80) // Status Change
}
}
}
Device (PWRB)
{
Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
Device (VR07)
{
Name (_HID, "LNRO0005") // _HID: Hardware ID
Name (_UID, 0x07) // _UID: Unique ID
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0xFEB00E00, // Address Base
0x00000200, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
0x00000017,
}
})
}
}
Scope (\)
{
Name (_S5, Package (0x04) // _S5_: S5 System State
{
0x05,
Zero,
Zero,
Zero
})
}
}

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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/microvm/FACP, Mon Sep 28 17:24:38 2020
*
* ACPI Data Table [FACP]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)]
[004h 0004 4] Table Length : 0000010C
[008h 0008 1] Revision : 05
[009h 0009 1] Checksum : 7E
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCFACP"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] FACS Address : 00000000
[028h 0040 4] DSDT Address : 00000000
[02Ch 0044 1] Model : 00
[02Dh 0045 1] PM Profile : 00 [Unspecified]
[02Eh 0046 2] SCI Interrupt : 0000
[030h 0048 4] SMI Command Port : 00000000
[034h 0052 1] ACPI Enable Value : 00
[035h 0053 1] ACPI Disable Value : 00
[036h 0054 1] S4BIOS Command : 00
[037h 0055 1] P-State Control : 00
[038h 0056 4] PM1A Event Block Address : 00000000
[03Ch 0060 4] PM1B Event Block Address : 00000000
[040h 0064 4] PM1A Control Block Address : 00000000
[044h 0068 4] PM1B Control Block Address : 00000000
[048h 0072 4] PM2 Control Block Address : 00000000
[04Ch 0076 4] PM Timer Block Address : 00000000
[050h 0080 4] GPE0 Block Address : 00000000
[054h 0084 4] GPE1 Block Address : 00000000
[058h 0088 1] PM1 Event Block Length : 00
[059h 0089 1] PM1 Control Block Length : 00
[05Ah 0090 1] PM2 Control Block Length : 00
[05Bh 0091 1] PM Timer Block Length : 00
[05Ch 0092 1] GPE0 Block Length : 00
[05Dh 0093 1] GPE1 Block Length : 00
[05Eh 0094 1] GPE1 Base Offset : 00
[05Fh 0095 1] _CST Support : 00
[060h 0096 2] C2 Latency : 0000
[062h 0098 2] C3 Latency : 0000
[064h 0100 2] CPU Cache Size : 0000
[066h 0102 2] Cache Flush Stride : 0000
[068h 0104 1] Duty Cycle Offset : 00
[069h 0105 1] Duty Cycle Width : 00
[06Ah 0106 1] RTC Day Alarm Index : 00
[06Bh 0107 1] RTC Month Alarm Index : 00
[06Ch 0108 1] RTC Century Index : 00
[06Dh 0109 2] Boot Flags (decoded below) : 0000
Legacy Devices Supported (V2) : 0
8042 Present on ports 60/64 (V2) : 0
VGA Not Present (V4) : 0
MSI Not Supported (V4) : 0
PCIe ASPM Not Supported (V4) : 0
CMOS RTC Not Present (V5) : 0
[06Fh 0111 1] Reserved : 00
[070h 0112 4] Flags (decoded below) : 00100400
WBINVD instruction is operational (V1) : 0
WBINVD flushes all caches (V1) : 0
All CPUs support C1 (V1) : 0
C2 works on MP system (V1) : 0
Control Method Power Button (V1) : 0
Control Method Sleep Button (V1) : 0
RTC wake not in fixed reg space (V1) : 0
RTC can wake system from S4 (V1) : 0
32-bit PM Timer (V1) : 0
Docking Supported (V1) : 0
Reset Register Supported (V2) : 1
Sealed Case (V3) : 0
Headless - No Video (V3) : 0
Use native instr after SLP_TYPx (V3) : 0
PCIEXP_WAK Bits Supported (V4) : 0
Use Platform Timer (V4) : 0
RTC_STS valid on S4 wake (V4) : 0
Remote Power-on capable (V4) : 0
Use APIC Cluster Model (V4) : 0
Use APIC Physical Destination Mode (V4) : 0
Hardware Reduced (V5) : 1
Low Power S0 Idle (V5) : 0
[074h 0116 12] Reset Register : [Generic Address Structure]
[074h 0116 1] Space ID : 00 [SystemMemory]
[075h 0117 1] Bit Width : 08
[076h 0118 1] Bit Offset : 00
[077h 0119 1] Encoded Access Width : 00 [Undefined/Legacy]
[078h 0120 8] Address : 00000000FEA00202
[080h 0128 1] Value to cause reset : 42
[081h 0129 2] ARM Flags (decoded below) : 0000
PSCI Compliant : 0
Must use HVC for PSCI : 0
[083h 0131 1] FADT Minor Revision : 00
[084h 0132 8] FACS Address : 0000000000000000
[08Ch 0140 8] DSDT Address : 0000000000000000
[094h 0148 12] PM1A Event Block : [Generic Address Structure]
[094h 0148 1] Space ID : 00 [SystemMemory]
[095h 0149 1] Bit Width : 00
[096h 0150 1] Bit Offset : 00
[097h 0151 1] Encoded Access Width : 00 [Undefined/Legacy]
[098h 0152 8] Address : 0000000000000000
[0A0h 0160 12] PM1B Event Block : [Generic Address Structure]
[0A0h 0160 1] Space ID : 00 [SystemMemory]
[0A1h 0161 1] Bit Width : 00
[0A2h 0162 1] Bit Offset : 00
[0A3h 0163 1] Encoded Access Width : 00 [Undefined/Legacy]
[0A4h 0164 8] Address : 0000000000000000
[0ACh 0172 12] PM1A Control Block : [Generic Address Structure]
[0ACh 0172 1] Space ID : 00 [SystemMemory]
[0ADh 0173 1] Bit Width : 00
[0AEh 0174 1] Bit Offset : 00
[0AFh 0175 1] Encoded Access Width : 00 [Undefined/Legacy]
[0B0h 0176 8] Address : 0000000000000000
[0B8h 0184 12] PM1B Control Block : [Generic Address Structure]
[0B8h 0184 1] Space ID : 00 [SystemMemory]
[0B9h 0185 1] Bit Width : 00
[0BAh 0186 1] Bit Offset : 00
[0BBh 0187 1] Encoded Access Width : 00 [Undefined/Legacy]
[0BCh 0188 8] Address : 0000000000000000
[0C4h 0196 12] PM2 Control Block : [Generic Address Structure]
[0C4h 0196 1] Space ID : 00 [SystemMemory]
[0C5h 0197 1] Bit Width : 00
[0C6h 0198 1] Bit Offset : 00
[0C7h 0199 1] Encoded Access Width : 00 [Undefined/Legacy]
[0C8h 0200 8] Address : 0000000000000000
[0D0h 0208 12] PM Timer Block : [Generic Address Structure]
[0D0h 0208 1] Space ID : 00 [SystemMemory]
[0D1h 0209 1] Bit Width : 00
[0D2h 0210 1] Bit Offset : 00
[0D3h 0211 1] Encoded Access Width : 00 [Undefined/Legacy]
[0D4h 0212 8] Address : 0000000000000000
[0DCh 0220 12] GPE0 Block : [Generic Address Structure]
[0DCh 0220 1] Space ID : 00 [SystemMemory]
[0DDh 0221 1] Bit Width : 00
[0DEh 0222 1] Bit Offset : 00
[0DFh 0223 1] Encoded Access Width : 00 [Undefined/Legacy]
[0E0h 0224 8] Address : 0000000000000000
[0E8h 0232 12] GPE1 Block : [Generic Address Structure]
[0E8h 0232 1] Space ID : 00 [SystemMemory]
[0E9h 0233 1] Bit Width : 00
[0EAh 0234 1] Bit Offset : 00
[0EBh 0235 1] Encoded Access Width : 00 [Undefined/Legacy]
[0ECh 0236 8] Address : 0000000000000000
[0F4h 0244 12] Sleep Control Register : [Generic Address Structure]
[0F4h 0244 1] Space ID : 00 [SystemMemory]
[0F5h 0245 1] Bit Width : 08
[0F6h 0246 1] Bit Offset : 00
[0F7h 0247 1] Encoded Access Width : 00 [Undefined/Legacy]
[0F8h 0248 8] Address : 00000000FEA00200
[100h 0256 12] Sleep Status Register : [Generic Address Structure]
[100h 0256 1] Space ID : 00 [SystemMemory]
[101h 0257 1] Bit Width : 08
[102h 0258 1] Bit Offset : 00
[103h 0259 1] Encoded Access Width : 00 [Undefined/Legacy]
[104h 0260 8] Address : 00000000FEA00201
/**** ACPI table terminates in the middle of a data structure! (dump table) */
Raw Table Data: Length 268 (0x10C)
0000: 46 41 43 50 0C 01 00 00 05 7E 42 4F 43 48 53 20 // FACP.....~BOCHS
0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC
0020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
0070: 00 04 10 00 00 08 00 00 02 02 A0 FE 00 00 00 00 // ................
0080: 42 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // B...............
0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................
00F0: 00 00 00 00 00 08 00 00 00 02 A0 FE 00 00 00 00 // ................
0100: 00 08 00 00 01 02 A0 FE 00 00 00 00 // ............

112
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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/APIC.acpihmat, Tue Aug 4 11:14:15 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000080
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : DA
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
[035h 0053 1] Length : 08
[036h 0054 1] Processor ID : 01
[037h 0055 1] Local Apic ID : 01
[038h 0056 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[03Ch 0060 1] Subtable Type : 01 [I/O APIC]
[03Dh 0061 1] Length : 0C
[03Eh 0062 1] I/O Apic ID : 00
[03Fh 0063 1] Reserved : 00
[040h 0064 4] Address : FEC00000
[044h 0068 4] Interrupt : 00000000
[048h 0072 1] Subtable Type : 02 [Interrupt Source Override]
[049h 0073 1] Length : 0A
[04Ah 0074 1] Bus : 00
[04Bh 0075 1] Source : 00
[04Ch 0076 4] Interrupt : 00000002
[050h 0080 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[052h 0082 1] Subtable Type : 02 [Interrupt Source Override]
[053h 0083 1] Length : 0A
[054h 0084 1] Bus : 00
[055h 0085 1] Source : 05
[056h 0086 4] Interrupt : 00000005
[05Ah 0090 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[05Ch 0092 1] Subtable Type : 02 [Interrupt Source Override]
[05Dh 0093 1] Length : 0A
[05Eh 0094 1] Bus : 00
[05Fh 0095 1] Source : 09
[060h 0096 4] Interrupt : 00000009
[064h 0100 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[066h 0102 1] Subtable Type : 02 [Interrupt Source Override]
[067h 0103 1] Length : 0A
[068h 0104 1] Bus : 00
[069h 0105 1] Source : 0A
[06Ah 0106 4] Interrupt : 0000000A
[06Eh 0110 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[070h 0112 1] Subtable Type : 02 [Interrupt Source Override]
[071h 0113 1] Length : 0A
[072h 0114 1] Bus : 00
[073h 0115 1] Source : 0B
[074h 0116 4] Interrupt : 0000000B
[078h 0120 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[07Ah 0122 1] Subtable Type : 04 [Local APIC NMI]
[07Bh 0123 1] Length : 06
[07Ch 0124 1] Processor ID : FF
[07Dh 0125 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[07Fh 0127 1] Interrupt Input LINT : 01
Raw Table Data: Length 128 (0x80)
0000: 41 50 49 43 80 00 00 00 01 DA 42 4F 43 48 53 20 // APIC......BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 00 08 01 01 01 00 00 00 01 0C 00 00 // ................
0040: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................
0050: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................
0060: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................
0070: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................

BIN
tests/data/acpi/pc/APIC.bridge Normal file
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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/APIC.bridge, Tue Aug 4 11:14:15 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : ED
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
[040h 0064 1] Subtable Type : 02 [Interrupt Source Override]
[041h 0065 1] Length : 0A
[042h 0066 1] Bus : 00
[043h 0067 1] Source : 00
[044h 0068 4] Interrupt : 00000002
[048h 0072 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override]
[04Bh 0075 1] Length : 0A
[04Ch 0076 1] Bus : 00
[04Dh 0077 1] Source : 05
[04Eh 0078 4] Interrupt : 00000005
[052h 0082 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[054h 0084 1] Subtable Type : 02 [Interrupt Source Override]
[055h 0085 1] Length : 0A
[056h 0086 1] Bus : 00
[057h 0087 1] Source : 09
[058h 0088 4] Interrupt : 00000009
[05Ch 0092 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override]
[05Fh 0095 1] Length : 0A
[060h 0096 1] Bus : 00
[061h 0097 1] Source : 0A
[062h 0098 4] Interrupt : 0000000A
[066h 0102 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
[069h 0105 1] Length : 0A
[06Ah 0106 1] Bus : 00
[06Bh 0107 1] Source : 0B
[06Ch 0108 4] Interrupt : 0000000B
[070h 0112 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[072h 0114 1] Subtable Type : 04 [Local APIC NMI]
[073h 0115 1] Length : 06
[074h 0116 1] Processor ID : FF
[075h 0117 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[077h 0119 1] Interrupt Input LINT : 01
Raw Table Data: Length 120 (0x78)
0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................
0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................
0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................
0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................
0070: 0D 00 04 06 FF 00 00 01 // ........

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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/APIC.cphp, Tue Aug 4 11:14:15 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 000000A0
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : 7B
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
[035h 0053 1] Length : 08
[036h 0054 1] Processor ID : 01
[037h 0055 1] Local Apic ID : 01
[038h 0056 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC]
[03Dh 0061 1] Length : 08
[03Eh 0062 1] Processor ID : 02
[03Fh 0063 1] Local Apic ID : 02
[040h 0064 4] Flags (decoded below) : 00000000
Processor Enabled : 0
Runtime Online Capable : 0
[044h 0068 1] Subtable Type : 00 [Processor Local APIC]
[045h 0069 1] Length : 08
[046h 0070 1] Processor ID : 03
[047h 0071 1] Local Apic ID : 04
[048h 0072 4] Flags (decoded below) : 00000000
Processor Enabled : 0
Runtime Online Capable : 0
[04Ch 0076 1] Subtable Type : 00 [Processor Local APIC]
[04Dh 0077 1] Length : 08
[04Eh 0078 1] Processor ID : 04
[04Fh 0079 1] Local Apic ID : 05
[050h 0080 4] Flags (decoded below) : 00000000
Processor Enabled : 0
Runtime Online Capable : 0
[054h 0084 1] Subtable Type : 00 [Processor Local APIC]
[055h 0085 1] Length : 08
[056h 0086 1] Processor ID : 05
[057h 0087 1] Local Apic ID : 06
[058h 0088 4] Flags (decoded below) : 00000000
Processor Enabled : 0
Runtime Online Capable : 0
[05Ch 0092 1] Subtable Type : 01 [I/O APIC]
[05Dh 0093 1] Length : 0C
[05Eh 0094 1] I/O Apic ID : 00
[05Fh 0095 1] Reserved : 00
[060h 0096 4] Address : FEC00000
[064h 0100 4] Interrupt : 00000000
[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
[069h 0105 1] Length : 0A
[06Ah 0106 1] Bus : 00
[06Bh 0107 1] Source : 00
[06Ch 0108 4] Interrupt : 00000002
[070h 0112 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[072h 0114 1] Subtable Type : 02 [Interrupt Source Override]
[073h 0115 1] Length : 0A
[074h 0116 1] Bus : 00
[075h 0117 1] Source : 05
[076h 0118 4] Interrupt : 00000005
[07Ah 0122 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[07Ch 0124 1] Subtable Type : 02 [Interrupt Source Override]
[07Dh 0125 1] Length : 0A
[07Eh 0126 1] Bus : 00
[07Fh 0127 1] Source : 09
[080h 0128 4] Interrupt : 00000009
[084h 0132 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[086h 0134 1] Subtable Type : 02 [Interrupt Source Override]
[087h 0135 1] Length : 0A
[088h 0136 1] Bus : 00
[089h 0137 1] Source : 0A
[08Ah 0138 4] Interrupt : 0000000A
[08Eh 0142 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[090h 0144 1] Subtable Type : 02 [Interrupt Source Override]
[091h 0145 1] Length : 0A
[092h 0146 1] Bus : 00
[093h 0147 1] Source : 0B
[094h 0148 4] Interrupt : 0000000B
[098h 0152 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[09Ah 0154 1] Subtable Type : 04 [Local APIC NMI]
[09Bh 0155 1] Length : 06
[09Ch 0156 1] Processor ID : FF
[09Dh 0157 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[09Fh 0159 1] Interrupt Input LINT : 01
Raw Table Data: Length 160 (0xA0)
0000: 41 50 49 43 A0 00 00 00 01 7B 42 4F 43 48 53 20 // APIC.....{BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................
0040: 00 00 00 00 00 08 03 04 00 00 00 00 00 08 04 05 // ................
0050: 00 00 00 00 00 08 05 06 00 00 00 00 01 0C 00 00 // ................
0060: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................
0070: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................
0080: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................
0090: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................

129
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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/APIC.dimmpxm, Tue Aug 4 11:14:15 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000090
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : AE
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 00 [Processor Local APIC]
[035h 0053 1] Length : 08
[036h 0054 1] Processor ID : 01
[037h 0055 1] Local Apic ID : 01
[038h 0056 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC]
[03Dh 0061 1] Length : 08
[03Eh 0062 1] Processor ID : 02
[03Fh 0063 1] Local Apic ID : 02
[040h 0064 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[044h 0068 1] Subtable Type : 00 [Processor Local APIC]
[045h 0069 1] Length : 08
[046h 0070 1] Processor ID : 03
[047h 0071 1] Local Apic ID : 03
[048h 0072 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[04Ch 0076 1] Subtable Type : 01 [I/O APIC]
[04Dh 0077 1] Length : 0C
[04Eh 0078 1] I/O Apic ID : 00
[04Fh 0079 1] Reserved : 00
[050h 0080 4] Address : FEC00000
[054h 0084 4] Interrupt : 00000000
[058h 0088 1] Subtable Type : 02 [Interrupt Source Override]
[059h 0089 1] Length : 0A
[05Ah 0090 1] Bus : 00
[05Bh 0091 1] Source : 00
[05Ch 0092 4] Interrupt : 00000002
[060h 0096 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[062h 0098 1] Subtable Type : 02 [Interrupt Source Override]
[063h 0099 1] Length : 0A
[064h 0100 1] Bus : 00
[065h 0101 1] Source : 05
[066h 0102 4] Interrupt : 00000005
[06Ah 0106 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[06Ch 0108 1] Subtable Type : 02 [Interrupt Source Override]
[06Dh 0109 1] Length : 0A
[06Eh 0110 1] Bus : 00
[06Fh 0111 1] Source : 09
[070h 0112 4] Interrupt : 00000009
[074h 0116 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[076h 0118 1] Subtable Type : 02 [Interrupt Source Override]
[077h 0119 1] Length : 0A
[078h 0120 1] Bus : 00
[079h 0121 1] Source : 0A
[07Ah 0122 4] Interrupt : 0000000A
[07Eh 0126 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[080h 0128 1] Subtable Type : 02 [Interrupt Source Override]
[081h 0129 1] Length : 0A
[082h 0130 1] Bus : 00
[083h 0131 1] Source : 0B
[084h 0132 4] Interrupt : 0000000B
[088h 0136 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[08Ah 0138 1] Subtable Type : 04 [Local APIC NMI]
[08Bh 0139 1] Length : 06
[08Ch 0140 1] Processor ID : FF
[08Dh 0141 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[08Fh 0143 1] Interrupt Input LINT : 01
Raw Table Data: Length 144 (0x90)
0000: 41 50 49 43 90 00 00 00 01 AE 42 4F 43 48 53 20 // APIC......BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................
0040: 01 00 00 00 00 08 03 03 01 00 00 00 01 0C 00 00 // ................
0050: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................
0060: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................
0070: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................
0080: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................

104
tests/data/acpi/pc/APIC.dsl Normal file
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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/APIC.roothp, Mon Sep 28 17:24:38 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : ED
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
[040h 0064 1] Subtable Type : 02 [Interrupt Source Override]
[041h 0065 1] Length : 0A
[042h 0066 1] Bus : 00
[043h 0067 1] Source : 00
[044h 0068 4] Interrupt : 00000002
[048h 0072 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override]
[04Bh 0075 1] Length : 0A
[04Ch 0076 1] Bus : 00
[04Dh 0077 1] Source : 05
[04Eh 0078 4] Interrupt : 00000005
[052h 0082 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[054h 0084 1] Subtable Type : 02 [Interrupt Source Override]
[055h 0085 1] Length : 0A
[056h 0086 1] Bus : 00
[057h 0087 1] Source : 09
[058h 0088 4] Interrupt : 00000009
[05Ch 0092 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override]
[05Fh 0095 1] Length : 0A
[060h 0096 1] Bus : 00
[061h 0097 1] Source : 0A
[062h 0098 4] Interrupt : 0000000A
[066h 0102 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
[069h 0105 1] Length : 0A
[06Ah 0106 1] Bus : 00
[06Bh 0107 1] Source : 0B
[06Ch 0108 4] Interrupt : 0000000B
[070h 0112 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[072h 0114 1] Subtable Type : 04 [Local APIC NMI]
[073h 0115 1] Length : 06
[074h 0116 1] Processor ID : FF
[075h 0117 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[077h 0119 1] Interrupt Input LINT : 01
Raw Table Data: Length 120 (0x78)
0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................
0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................
0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................
0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................
0070: 0D 00 04 06 FF 00 00 01 // ........

BIN
tests/data/acpi/pc/APIC.hpbridge Normal file
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tests/data/acpi/pc/APIC.ipmikcs Normal file
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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/APIC.ipmikcs, Tue Aug 4 11:14:15 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : ED
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
[040h 0064 1] Subtable Type : 02 [Interrupt Source Override]
[041h 0065 1] Length : 0A
[042h 0066 1] Bus : 00
[043h 0067 1] Source : 00
[044h 0068 4] Interrupt : 00000002
[048h 0072 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override]
[04Bh 0075 1] Length : 0A
[04Ch 0076 1] Bus : 00
[04Dh 0077 1] Source : 05
[04Eh 0078 4] Interrupt : 00000005
[052h 0082 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[054h 0084 1] Subtable Type : 02 [Interrupt Source Override]
[055h 0085 1] Length : 0A
[056h 0086 1] Bus : 00
[057h 0087 1] Source : 09
[058h 0088 4] Interrupt : 00000009
[05Ch 0092 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override]
[05Fh 0095 1] Length : 0A
[060h 0096 1] Bus : 00
[061h 0097 1] Source : 0A
[062h 0098 4] Interrupt : 0000000A
[066h 0102 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
[069h 0105 1] Length : 0A
[06Ah 0106 1] Bus : 00
[06Bh 0107 1] Source : 0B
[06Ch 0108 4] Interrupt : 0000000B
[070h 0112 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[072h 0114 1] Subtable Type : 04 [Local APIC NMI]
[073h 0115 1] Length : 06
[074h 0116 1] Processor ID : FF
[075h 0117 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[077h 0119 1] Interrupt Input LINT : 01
Raw Table Data: Length 120 (0x78)
0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................
0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................
0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................
0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................
0070: 0D 00 04 06 FF 00 00 01 // ........

BIN
tests/data/acpi/pc/APIC.memhp Normal file
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tests/data/acpi/pc/APIC.memhp.dsl Normal file
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/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20190509 (64-bit version)
* Copyright (c) 2000 - 2019 Intel Corporation
*
* Disassembly of tests/data/acpi/pc/APIC.memhp, Tue Aug 4 11:14:15 2020
*
* ACPI Data Table [APIC]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)]
[004h 0004 4] Table Length : 00000078
[008h 0008 1] Revision : 01
[009h 0009 1] Checksum : ED
[00Ah 0010 6] Oem ID : "BOCHS "
[010h 0016 8] Oem Table ID : "BXPCAPIC"
[018h 0024 4] Oem Revision : 00000001
[01Ch 0028 4] Asl Compiler ID : "BXPC"
[020h 0032 4] Asl Compiler Revision : 00000001
[024h 0036 4] Local Apic Address : FEE00000
[028h 0040 4] Flags (decoded below) : 00000001
PC-AT Compatibility : 1
[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC]
[02Dh 0045 1] Length : 08
[02Eh 0046 1] Processor ID : 00
[02Fh 0047 1] Local Apic ID : 00
[030h 0048 4] Flags (decoded below) : 00000001
Processor Enabled : 1
Runtime Online Capable : 0
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
[040h 0064 1] Subtable Type : 02 [Interrupt Source Override]
[041h 0065 1] Length : 0A
[042h 0066 1] Bus : 00
[043h 0067 1] Source : 00
[044h 0068 4] Interrupt : 00000002
[048h 0072 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override]
[04Bh 0075 1] Length : 0A
[04Ch 0076 1] Bus : 00
[04Dh 0077 1] Source : 05
[04Eh 0078 4] Interrupt : 00000005
[052h 0082 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[054h 0084 1] Subtable Type : 02 [Interrupt Source Override]
[055h 0085 1] Length : 0A
[056h 0086 1] Bus : 00
[057h 0087 1] Source : 09
[058h 0088 4] Interrupt : 00000009
[05Ch 0092 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override]
[05Fh 0095 1] Length : 0A
[060h 0096 1] Bus : 00
[061h 0097 1] Source : 0A
[062h 0098 4] Interrupt : 0000000A
[066h 0102 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[068h 0104 1] Subtable Type : 02 [Interrupt Source Override]
[069h 0105 1] Length : 0A
[06Ah 0106 1] Bus : 00
[06Bh 0107 1] Source : 0B
[06Ch 0108 4] Interrupt : 0000000B
[070h 0112 2] Flags (decoded below) : 000D
Polarity : 1
Trigger Mode : 3
[072h 0114 1] Subtable Type : 04 [Local APIC NMI]
[073h 0115 1] Length : 06
[074h 0116 1] Processor ID : FF
[075h 0117 2] Flags (decoded below) : 0000
Polarity : 0
Trigger Mode : 0
[077h 0119 1] Interrupt Input LINT : 01
Raw Table Data: Length 120 (0x78)
0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS
0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC
0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................
0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................
0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................
0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................
0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................
0070: 0D 00 04 06 FF 00 00 01 // ........

BIN
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