Avoid CPU endian memory accesses in devices
Don't compile virtio.c in hwlib, it depends on memory accesses performed in CPU endianness. Make loads and stores in CPU endianness unavailable to devices and poison them to avoid further bugs. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -171,7 +171,7 @@ user-obj-y += cutils.o cache-utils.o
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hw-obj-y =
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hw-obj-y += vl.o loader.o
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hw-obj-$(CONFIG_VIRTIO) += virtio.o virtio-console.o
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hw-obj-$(CONFIG_VIRTIO) += virtio-console.o
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hw-obj-$(CONFIG_VIRTIO_PCI) += virtio-pci.o
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hw-obj-y += fw_cfg.o
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hw-obj-$(CONFIG_PCI) += pci.o pci_bridge.o
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@ -191,7 +191,7 @@ obj-y = arch_init.o cpus.o monitor.o machine.o gdbstub.o balloon.o
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# virtio has to be here due to weird dependency between PCI and virtio-net.
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# need to fix this properly
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obj-$(CONFIG_NO_PCI) += pci-stub.o
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obj-$(CONFIG_VIRTIO) += virtio-blk.o virtio-balloon.o virtio-net.o virtio-serial-bus.o
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obj-$(CONFIG_VIRTIO) += virtio.o virtio-blk.o virtio-balloon.o virtio-net.o virtio-serial-bus.o
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obj-y += vhost_net.o
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obj-$(CONFIG_VHOST_NET) += vhost.o
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obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/virtio-9p-device.o
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19
cpu-common.h
19
cpu-common.h
@ -134,28 +134,31 @@ void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
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void qemu_flush_coalesced_mmio_buffer(void);
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uint32_t ldub_phys(target_phys_addr_t addr);
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uint32_t lduw_phys(target_phys_addr_t addr);
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uint32_t lduw_le_phys(target_phys_addr_t addr);
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uint32_t lduw_be_phys(target_phys_addr_t addr);
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uint32_t ldl_phys(target_phys_addr_t addr);
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uint32_t ldl_le_phys(target_phys_addr_t addr);
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uint32_t ldl_be_phys(target_phys_addr_t addr);
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uint64_t ldq_phys(target_phys_addr_t addr);
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uint64_t ldq_le_phys(target_phys_addr_t addr);
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uint64_t ldq_be_phys(target_phys_addr_t addr);
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void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
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void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
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void stb_phys(target_phys_addr_t addr, uint32_t val);
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void stw_phys(target_phys_addr_t addr, uint32_t val);
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void stw_le_phys(target_phys_addr_t addr, uint32_t val);
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void stw_be_phys(target_phys_addr_t addr, uint32_t val);
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void stl_phys(target_phys_addr_t addr, uint32_t val);
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void stl_le_phys(target_phys_addr_t addr, uint32_t val);
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void stl_be_phys(target_phys_addr_t addr, uint32_t val);
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void stq_phys(target_phys_addr_t addr, uint64_t val);
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void stq_le_phys(target_phys_addr_t addr, uint64_t val);
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void stq_be_phys(target_phys_addr_t addr, uint64_t val);
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#ifdef NEED_CPU_H
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uint32_t lduw_phys(target_phys_addr_t addr);
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uint32_t ldl_phys(target_phys_addr_t addr);
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uint64_t ldq_phys(target_phys_addr_t addr);
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void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
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void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
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void stw_phys(target_phys_addr_t addr, uint32_t val);
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void stl_phys(target_phys_addr_t addr, uint32_t val);
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void stq_phys(target_phys_addr_t addr, uint64_t val);
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#endif
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void cpu_physical_memory_write_rom(target_phys_addr_t addr,
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const uint8_t *buf, int len);
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9
poison.h
9
poison.h
@ -37,6 +37,15 @@
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#pragma GCC poison CPUState
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#pragma GCC poison env
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#pragma GCC poison lduw_phys
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#pragma GCC poison ldl_phys
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#pragma GCC poison ldq_phys
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#pragma GCC poison stl_phys_notdirty
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#pragma GCC poison stq_phys_notdirty
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#pragma GCC poison stw_phys
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#pragma GCC poison stl_phys
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#pragma GCC poison stq_phys
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#pragma GCC poison CPU_INTERRUPT_HARD
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#pragma GCC poison CPU_INTERRUPT_EXITTB
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#pragma GCC poison CPU_INTERRUPT_HALT
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