exec: Make stl_phys_notdirty input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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parent
ab1da85791
commit
2198a12143
4
exec.c
4
exec.c
@ -2534,14 +2534,14 @@ uint32_t lduw_be_phys(AddressSpace *as, hwaddr addr)
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/* warning: addr must be aligned. The ram page is not masked as dirty
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and the code inside is not invalidated. It is useful if the dirty
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bits are used to track modified PTEs */
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void stl_phys_notdirty(hwaddr addr, uint32_t val)
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void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val)
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{
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uint8_t *ptr;
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MemoryRegion *mr;
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hwaddr l = 4;
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hwaddr addr1;
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mr = address_space_translate(&address_space_memory, addr, &addr1, &l,
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mr = address_space_translate(as, addr, &addr1, &l,
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true);
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if (l < 4 || !memory_access_is_direct(mr, true)) {
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io_mem_write(mr, addr1, val, 4);
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@ -16,6 +16,7 @@
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#include "elf.h"
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#include "sysemu/device_tree.h"
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#include "qemu/config-file.h"
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#include "exec/address-spaces.h"
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/* Kernel boot protocol is specified in the kernel docs
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* Documentation/arm/Booting and Documentation/arm64/booting.txt
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@ -169,7 +170,7 @@ static void default_reset_secondary(ARMCPU *cpu,
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{
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CPUARMState *env = &cpu->env;
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stl_phys_notdirty(info->smp_bootreg_addr, 0);
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stl_phys_notdirty(&address_space_memory, info->smp_bootreg_addr, 0);
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env->regs[15] = info->smp_loader_start;
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}
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@ -179,7 +180,7 @@ static inline bool have_dtb(const struct arm_boot_info *info)
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}
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#define WRITE_WORD(p, value) do { \
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stl_phys_notdirty(p, value); \
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stl_phys_notdirty(&address_space_memory, p, value); \
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p += 4; \
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} while (0)
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@ -69,11 +69,11 @@ static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
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switch (info->nb_cpus) {
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case 4:
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stl_phys_notdirty(SMP_BOOT_REG + 0x30, 0);
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stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x30, 0);
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case 3:
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stl_phys_notdirty(SMP_BOOT_REG + 0x20, 0);
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stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x20, 0);
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case 2:
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stl_phys_notdirty(SMP_BOOT_REG + 0x10, 0);
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stl_phys_notdirty(&address_space_memory, SMP_BOOT_REG + 0x10, 0);
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env->regs[15] = SMP_BOOT_ADDR;
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break;
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default:
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@ -102,7 +102,7 @@ void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
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uint32_t lduw_phys(AddressSpace *as, hwaddr addr);
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uint32_t ldl_phys(AddressSpace *as, hwaddr addr);
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uint64_t ldq_phys(AddressSpace *as, hwaddr addr);
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void stl_phys_notdirty(hwaddr addr, uint32_t val);
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void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val);
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void stw_phys(hwaddr addr, uint32_t val);
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void stl_phys(AddressSpace *as, hwaddr addr, uint32_t val);
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void stq_phys(AddressSpace *as, hwaddr addr, uint64_t val);
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@ -574,7 +574,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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}
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if (!(pml4e & PG_ACCESSED_MASK)) {
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pml4e |= PG_ACCESSED_MASK;
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stl_phys_notdirty(pml4e_addr, pml4e);
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stl_phys_notdirty(cs->as, pml4e_addr, pml4e);
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}
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ptep = pml4e ^ PG_NX_MASK;
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pdpe_addr = ((pml4e & PHYS_ADDR_MASK) + (((addr >> 30) & 0x1ff) << 3)) &
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@ -591,7 +591,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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ptep &= pdpe ^ PG_NX_MASK;
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if (!(pdpe & PG_ACCESSED_MASK)) {
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pdpe |= PG_ACCESSED_MASK;
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stl_phys_notdirty(pdpe_addr, pdpe);
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stl_phys_notdirty(cs->as, pdpe_addr, pdpe);
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}
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} else
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#endif
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@ -661,7 +661,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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pde |= PG_ACCESSED_MASK;
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if (is_dirty)
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pde |= PG_DIRTY_MASK;
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stl_phys_notdirty(pde_addr, pde);
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stl_phys_notdirty(cs->as, pde_addr, pde);
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}
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/* align to page_size */
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pte = pde & ((PHYS_ADDR_MASK & ~(page_size - 1)) | 0xfff);
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@ -670,7 +670,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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/* 4 KB page */
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if (!(pde & PG_ACCESSED_MASK)) {
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pde |= PG_ACCESSED_MASK;
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stl_phys_notdirty(pde_addr, pde);
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stl_phys_notdirty(cs->as, pde_addr, pde);
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}
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pte_addr = ((pde & PHYS_ADDR_MASK) + (((addr >> 12) & 0x1ff) << 3)) &
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env->a20_mask;
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@ -723,7 +723,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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pte |= PG_ACCESSED_MASK;
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if (is_dirty)
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pte |= PG_DIRTY_MASK;
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stl_phys_notdirty(pte_addr, pte);
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stl_phys_notdirty(cs->as, pte_addr, pte);
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}
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page_size = 4096;
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virt_addr = addr & ~0xfff;
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@ -778,7 +778,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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pde |= PG_ACCESSED_MASK;
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if (is_dirty)
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pde |= PG_DIRTY_MASK;
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stl_phys_notdirty(pde_addr, pde);
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stl_phys_notdirty(cs->as, pde_addr, pde);
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}
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pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */
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@ -787,7 +787,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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} else {
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if (!(pde & PG_ACCESSED_MASK)) {
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pde |= PG_ACCESSED_MASK;
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stl_phys_notdirty(pde_addr, pde);
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stl_phys_notdirty(cs->as, pde_addr, pde);
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}
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/* page directory entry */
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@ -835,7 +835,7 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
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pte |= PG_ACCESSED_MASK;
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if (is_dirty)
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pte |= PG_DIRTY_MASK;
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stl_phys_notdirty(pte_addr, pte);
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stl_phys_notdirty(cs->as, pte_addr, pte);
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}
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page_size = 4096;
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virt_addr = addr & ~0xfff;
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@ -180,7 +180,7 @@ static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
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if (is_dirty) {
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pde |= PG_MODIFIED_MASK;
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}
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stl_phys_notdirty(pde_ptr, pde);
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stl_phys_notdirty(cs->as, pde_ptr, pde);
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}
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/* the page can be put in the TLB */
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