target/xtensa: extract test for privileged instruction

- mark privileged instructions;
- put single privileged instruction check after disassembly loop;
- translate_[di]cache: drop parameter 0, shift parameters one down;

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2018-08-27 22:17:50 -07:00
parent 0946097051
commit 21a2dad5c4
1 changed files with 295 additions and 94 deletions

File diff suppressed because it is too large Load Diff