xilinx_spips: Make dma transactions as per dma_burst_size
Qspi dma has a burst length of 64 bytes, So limit the transactions w.r.t dma-burst-size property. Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1529660880-30376-1-git-send-email-sai.pavan.boddu@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -851,12 +851,17 @@ static void xlnx_zynqmp_qspips_notify(void *opaque)
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{
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size_t ret;
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uint32_t num;
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const void *rxd = pop_buf(recv_fifo, 4, &num);
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const void *rxd;
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int len;
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len = recv_fifo->num >= rq->dma_burst_size ? rq->dma_burst_size :
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recv_fifo->num;
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rxd = pop_buf(recv_fifo, len, &num);
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memcpy(rq->dma_buf, rxd, num);
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ret = stream_push(rq->dma, rq->dma_buf, 4);
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assert(ret == 4);
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ret = stream_push(rq->dma, rq->dma_buf, num);
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assert(ret == num);
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xlnx_zynqmp_qspips_check_flush(rq);
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}
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}
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@ -1333,6 +1338,12 @@ static void xlnx_zynqmp_qspips_realize(DeviceState *dev, Error **errp)
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XlnxZynqMPQSPIPS *s = XLNX_ZYNQMP_QSPIPS(dev);
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XilinxSPIPSClass *xsc = XILINX_SPIPS_GET_CLASS(s);
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if (s->dma_burst_size > QSPI_DMA_MAX_BURST_SIZE) {
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error_setg(errp,
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"qspi dma burst size %u exceeds maximum limit %d",
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s->dma_burst_size, QSPI_DMA_MAX_BURST_SIZE);
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return;
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}
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xilinx_qspips_realize(dev, errp);
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fifo8_create(&s->rx_fifo_g, xsc->rx_fifo_size);
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fifo8_create(&s->tx_fifo_g, xsc->tx_fifo_size);
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@ -1411,6 +1422,11 @@ static const VMStateDescription vmstate_xlnx_zynqmp_qspips = {
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}
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};
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static Property xilinx_zynqmp_qspips_properties[] = {
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DEFINE_PROP_UINT32("dma-burst-size", XlnxZynqMPQSPIPS, dma_burst_size, 64),
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DEFINE_PROP_END_OF_LIST(),
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};
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static Property xilinx_qspips_properties[] = {
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/* We had to turn this off for 2.10 as it is not compatible with migration.
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* It can be enabled but will prevent the device to be migrated.
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@ -1463,6 +1479,7 @@ static void xlnx_zynqmp_qspips_class_init(ObjectClass *klass, void * data)
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dc->realize = xlnx_zynqmp_qspips_realize;
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dc->reset = xlnx_zynqmp_qspips_reset;
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dc->vmsd = &vmstate_xlnx_zynqmp_qspips;
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dc->props = xilinx_zynqmp_qspips_properties;
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xsc->reg_ops = &xlnx_zynqmp_qspips_ops;
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xsc->rx_fifo_size = RXFF_A_Q;
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xsc->tx_fifo_size = TXFF_A_Q;
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@ -37,6 +37,8 @@ typedef struct XilinxSPIPS XilinxSPIPS;
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/* Bite off 4k chunks at a time */
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#define LQSPI_CACHE_SIZE 1024
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#define QSPI_DMA_MAX_BURST_SIZE 2048
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typedef enum {
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READ = 0x3, READ_4 = 0x13,
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FAST_READ = 0xb, FAST_READ_4 = 0x0c,
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@ -95,7 +97,6 @@ typedef struct {
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XilinxQSPIPS parent_obj;
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StreamSlave *dma;
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uint8_t dma_buf[4];
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int gqspi_irqline;
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uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX];
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@ -113,6 +114,8 @@ typedef struct {
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uint8_t rx_fifo_g_align;
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uint8_t tx_fifo_g_align;
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bool man_start_com_g;
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uint32_t dma_burst_size;
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uint8_t dma_buf[QSPI_DMA_MAX_BURST_SIZE];
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} XlnxZynqMPQSPIPS;
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typedef struct XilinxSPIPSClass {
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