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target/arm: Extend arm_pamax to more than aarch64

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Move the code from hw/arm/virt.c that is supposed
to handle v7 into the one function.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reported-by: He Zhe <zhe.he@windriver.com>
Message-id: 20220619001541.131672-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-06-18 17:15:40 -07:00 committed by Peter Maydell
parent d61d1b8600
commit 22536b1324
2 changed files with 17 additions and 17 deletions
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10
hw/arm/virt.c
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@ -2010,15 +2010,7 @@ static void machvirt_init(MachineState *machine)
cpuobj = object_new(possible_cpus->cpus[0].type);
armcpu = ARM_CPU(cpuobj);
if (object_property_get_bool(cpuobj, "aarch64", NULL)) {
pa_bits = arm_pamax(armcpu);
} else if (arm_feature(&armcpu->env, ARM_FEATURE_LPAE)) {
/* v7 with LPAE */
pa_bits = 40;
} else {
/* Anything else */
pa_bits = 32;
}
pa_bits = arm_pamax(armcpu);
object_unref(cpuobj);

24
target/arm/ptw.c
View File

@ -36,15 +36,23 @@ static const uint8_t pamax_map[] = {
/* The cpu-specific constant value of PAMax; also used by hw/arm/virt. */
unsigned int arm_pamax(ARMCPU *cpu)
{
unsigned int parange =
FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
unsigned int parange =
FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
/*
* id_aa64mmfr0 is a read-only register so values outside of the
* supported mappings can be considered an implementation error.
*/
assert(parange < ARRAY_SIZE(pamax_map));
return pamax_map[parange];
/*
* id_aa64mmfr0 is a read-only register so values outside of the
* supported mappings can be considered an implementation error.
*/
assert(parange < ARRAY_SIZE(pamax_map));
return pamax_map[parange];
}
if (arm_feature(&cpu->env, ARM_FEATURE_LPAE)) {
/* v7 with LPAE */
return 40;
}
/* Anything else */
return 32;
}
/*