hw/cxl/events: Wire up get/clear event mailbox commands
CXL testing is benefited from an artificial event log injection mechanism. Add an event log infrastructure to insert, get, and clear events from the various logs available on a device. Replace the stubbed out CXL Get/Clear Event mailbox commands with commands that operate on the new infrastructure. Signed-off-by: Ira Weiny <ira.weiny@intel.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20230530133603.16934-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Ira Weiny
Michael S. Tsirkin
parent
2f6b8c8f42
commit
22d7e3be07
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@ -0,0 +1,217 @@
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/*
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* CXL Event processing
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*
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* Copyright(C) 2023 Intel Corporation.
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See the
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* COPYING file in the top-level directory.
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*/
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#include <stdint.h>
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#include "qemu/osdep.h"
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#include "qemu/bswap.h"
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#include "qemu/typedefs.h"
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#include "qemu/error-report.h"
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#include "hw/cxl/cxl.h"
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#include "hw/cxl/cxl_events.h"
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/* Artificial limit on the number of events a log can hold */
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#define CXL_TEST_EVENT_OVERFLOW 8
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static void reset_overflow(CXLEventLog *log)
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{
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log->overflow_err_count = 0;
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log->first_overflow_timestamp = 0;
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log->last_overflow_timestamp = 0;
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}
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void cxl_event_init(CXLDeviceState *cxlds)
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{
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CXLEventLog *log;
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int i;
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for (i = 0; i < CXL_EVENT_TYPE_MAX; i++) {
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log = &cxlds->event_logs[i];
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log->next_handle = 1;
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log->overflow_err_count = 0;
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log->first_overflow_timestamp = 0;
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log->last_overflow_timestamp = 0;
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qemu_mutex_init(&log->lock);
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QSIMPLEQ_INIT(&log->events);
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}
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}
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static CXLEvent *cxl_event_get_head(CXLEventLog *log)
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{
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return QSIMPLEQ_FIRST(&log->events);
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}
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static CXLEvent *cxl_event_get_next(CXLEvent *entry)
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{
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return QSIMPLEQ_NEXT(entry, node);
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}
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static int cxl_event_count(CXLEventLog *log)
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{
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CXLEvent *event;
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int rc = 0;
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QSIMPLEQ_FOREACH(event, &log->events, node) {
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rc++;
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}
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return rc;
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}
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static bool cxl_event_empty(CXLEventLog *log)
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{
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return QSIMPLEQ_EMPTY(&log->events);
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}
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static void cxl_event_delete_head(CXLDeviceState *cxlds,
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CXLEventLogType log_type,
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CXLEventLog *log)
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{
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CXLEvent *entry = cxl_event_get_head(log);
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reset_overflow(log);
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QSIMPLEQ_REMOVE_HEAD(&log->events, node);
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if (cxl_event_empty(log)) {
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cxl_event_set_status(cxlds, log_type, false);
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}
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g_free(entry);
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}
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/*
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* return true if an interrupt should be generated as a result
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* of inserting this event.
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*/
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bool cxl_event_insert(CXLDeviceState *cxlds, CXLEventLogType log_type,
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CXLEventRecordRaw *event)
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{
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uint64_t time;
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CXLEventLog *log;
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CXLEvent *entry;
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if (log_type >= CXL_EVENT_TYPE_MAX) {
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return false;
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}
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time = cxl_device_get_timestamp(cxlds);
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log = &cxlds->event_logs[log_type];
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QEMU_LOCK_GUARD(&log->lock);
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if (cxl_event_count(log) >= CXL_TEST_EVENT_OVERFLOW) {
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if (log->overflow_err_count == 0) {
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log->first_overflow_timestamp = time;
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}
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log->overflow_err_count++;
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log->last_overflow_timestamp = time;
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return false;
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}
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entry = g_new0(CXLEvent, 1);
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memcpy(&entry->data, event, sizeof(*event));
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entry->data.hdr.handle = cpu_to_le16(log->next_handle);
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log->next_handle++;
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/* 0 handle is never valid */
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if (log->next_handle == 0) {
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log->next_handle++;
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}
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entry->data.hdr.timestamp = cpu_to_le64(time);
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QSIMPLEQ_INSERT_TAIL(&log->events, entry, node);
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cxl_event_set_status(cxlds, log_type, true);
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/* Count went from 0 to 1 */
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return cxl_event_count(log) == 1;
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}
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CXLRetCode cxl_event_get_records(CXLDeviceState *cxlds, CXLGetEventPayload *pl,
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uint8_t log_type, int max_recs,
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uint16_t *len)
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{
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CXLEventLog *log;
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CXLEvent *entry;
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uint16_t nr;
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if (log_type >= CXL_EVENT_TYPE_MAX) {
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return CXL_MBOX_INVALID_INPUT;
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}
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log = &cxlds->event_logs[log_type];
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QEMU_LOCK_GUARD(&log->lock);
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entry = cxl_event_get_head(log);
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for (nr = 0; entry && nr < max_recs; nr++) {
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memcpy(&pl->records[nr], &entry->data, CXL_EVENT_RECORD_SIZE);
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entry = cxl_event_get_next(entry);
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}
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if (!cxl_event_empty(log)) {
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pl->flags |= CXL_GET_EVENT_FLAG_MORE_RECORDS;
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}
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if (log->overflow_err_count) {
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pl->flags |= CXL_GET_EVENT_FLAG_OVERFLOW;
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pl->overflow_err_count = cpu_to_le16(log->overflow_err_count);
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pl->first_overflow_timestamp = cpu_to_le64(log->first_overflow_timestamp);
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pl->last_overflow_timestamp = cpu_to_le64(log->last_overflow_timestamp);
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}
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pl->record_count = cpu_to_le16(nr);
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*len = CXL_EVENT_PAYLOAD_HDR_SIZE + (CXL_EVENT_RECORD_SIZE * nr);
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return CXL_MBOX_SUCCESS;
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}
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CXLRetCode cxl_event_clear_records(CXLDeviceState *cxlds, CXLClearEventPayload *pl)
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{
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CXLEventLog *log;
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uint8_t log_type;
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CXLEvent *entry;
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int nr;
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log_type = pl->event_log;
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if (log_type >= CXL_EVENT_TYPE_MAX) {
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return CXL_MBOX_INVALID_INPUT;
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}
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log = &cxlds->event_logs[log_type];
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QEMU_LOCK_GUARD(&log->lock);
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/*
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* Must itterate the queue twice.
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* "The device shall verify the event record handles specified in the input
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* payload are in temporal order. If the device detects an older event
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* record that will not be cleared when Clear Event Records is executed,
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* the device shall return the Invalid Handle return code and shall not
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* clear any of the specified event records."
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* -- CXL 3.0 8.2.9.2.3
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*/
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entry = cxl_event_get_head(log);
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for (nr = 0; entry && nr < pl->nr_recs; nr++) {
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uint16_t handle = pl->handle[nr];
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/* NOTE: Both handles are little endian. */
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if (handle == 0 || entry->data.hdr.handle != handle) {
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return CXL_MBOX_INVALID_INPUT;
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}
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entry = cxl_event_get_next(entry);
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}
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entry = cxl_event_get_head(log);
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for (nr = 0; entry && nr < pl->nr_recs; nr++) {
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cxl_event_delete_head(cxlds, log_type, log);
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entry = cxl_event_get_head(log);
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}
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return CXL_MBOX_SUCCESS;
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}
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@ -9,6 +9,7 @@
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#include "qemu/osdep.h"
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#include "hw/cxl/cxl.h"
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#include "hw/cxl/cxl_events.h"
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#include "hw/pci/pci.h"
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#include "qemu/cutils.h"
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#include "qemu/log.h"
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@ -95,11 +96,46 @@ struct cxl_cmd {
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return CXL_MBOX_SUCCESS; \
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}
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DEFINE_MAILBOX_HANDLER_ZEROED(events_get_records, 0x20);
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DEFINE_MAILBOX_HANDLER_NOP(events_clear_records);
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DEFINE_MAILBOX_HANDLER_ZEROED(events_get_interrupt_policy, 4);
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DEFINE_MAILBOX_HANDLER_NOP(events_set_interrupt_policy);
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static CXLRetCode cmd_events_get_records(struct cxl_cmd *cmd,
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CXLDeviceState *cxlds,
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uint16_t *len)
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{
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CXLGetEventPayload *pl;
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uint8_t log_type;
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int max_recs;
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if (cmd->in < sizeof(log_type)) {
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return CXL_MBOX_INVALID_INPUT;
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}
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log_type = *((uint8_t *)cmd->payload);
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pl = (CXLGetEventPayload *)cmd->payload;
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memset(pl, 0, sizeof(*pl));
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max_recs = (cxlds->payload_size - CXL_EVENT_PAYLOAD_HDR_SIZE) /
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CXL_EVENT_RECORD_SIZE;
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if (max_recs > 0xFFFF) {
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max_recs = 0xFFFF;
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}
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return cxl_event_get_records(cxlds, pl, log_type, max_recs, len);
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}
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static CXLRetCode cmd_events_clear_records(struct cxl_cmd *cmd,
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CXLDeviceState *cxlds,
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uint16_t *len)
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{
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CXLClearEventPayload *pl;
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pl = (CXLClearEventPayload *)cmd->payload;
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*len = 0;
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return cxl_event_clear_records(cxlds, pl);
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}
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/* 8.2.9.2.1 */
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static CXLRetCode cmd_firmware_update_get_info(struct cxl_cmd *cmd,
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CXLDeviceState *cxl_dstate,
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@ -5,6 +5,7 @@ system_ss.add(when: 'CONFIG_CXL',
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'cxl-mailbox-utils.c',
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'cxl-host.c',
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'cxl-cdat.c',
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'cxl-events.c',
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),
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if_false: files(
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'cxl-host-stubs.c',
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goto err_release_cdat;
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}
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cxl_event_init(&ct3d->cxl_dstate);
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return;
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err_release_cdat:
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@ -111,6 +111,20 @@ typedef enum {
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CXL_MBOX_MAX = 0x17
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} CXLRetCode;
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typedef struct CXLEvent {
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CXLEventRecordRaw data;
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QSIMPLEQ_ENTRY(CXLEvent) node;
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} CXLEvent;
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typedef struct CXLEventLog {
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uint16_t next_handle;
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uint16_t overflow_err_count;
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uint64_t first_overflow_timestamp;
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uint64_t last_overflow_timestamp;
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QemuMutex lock;
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QSIMPLEQ_HEAD(, CXLEvent) events;
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} CXLEventLog;
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typedef struct cxl_device_state {
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MemoryRegion device_registers;
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@ -161,6 +175,8 @@ typedef struct cxl_device_state {
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uint64_t mem_size;
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uint64_t pmem_size;
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uint64_t vmem_size;
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CXLEventLog event_logs[CXL_EVENT_TYPE_MAX];
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} CXLDeviceState;
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/* Initialize the register block for a device */
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@ -353,6 +369,15 @@ MemTxResult cxl_type3_write(PCIDevice *d, hwaddr host_addr, uint64_t data,
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uint64_t cxl_device_get_timestamp(CXLDeviceState *cxlds);
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void cxl_event_init(CXLDeviceState *cxlds);
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bool cxl_event_insert(CXLDeviceState *cxlds, CXLEventLogType log_type,
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CXLEventRecordRaw *event);
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CXLRetCode cxl_event_get_records(CXLDeviceState *cxlds, CXLGetEventPayload *pl,
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uint8_t log_type, int max_recs,
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uint16_t *len);
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CXLRetCode cxl_event_clear_records(CXLDeviceState *cxlds,
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CXLClearEventPayload *pl);
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void cxl_set_poison_list_overflowed(CXLType3Dev *ct3d);
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#endif
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@ -10,6 +10,8 @@
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#ifndef CXL_EVENTS_H
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#define CXL_EVENTS_H
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#include "qemu/uuid.h"
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/*
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* CXL rev 3.0 section 8.2.9.2.2; Table 8-49
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*
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@ -25,4 +27,57 @@ typedef enum CXLEventLogType {
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CXL_EVENT_TYPE_MAX
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} CXLEventLogType;
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/*
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* Common Event Record Format
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* CXL rev 3.0 section 8.2.9.2.1; Table 8-42
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*/
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#define CXL_EVENT_REC_HDR_RES_LEN 0xf
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typedef struct CXLEventRecordHdr {
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QemuUUID id;
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uint8_t length;
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uint8_t flags[3];
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uint16_t handle;
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uint16_t related_handle;
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uint64_t timestamp;
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uint8_t maint_op_class;
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uint8_t reserved[CXL_EVENT_REC_HDR_RES_LEN];
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} QEMU_PACKED CXLEventRecordHdr;
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#define CXL_EVENT_RECORD_DATA_LENGTH 0x50
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typedef struct CXLEventRecordRaw {
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CXLEventRecordHdr hdr;
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uint8_t data[CXL_EVENT_RECORD_DATA_LENGTH];
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} QEMU_PACKED CXLEventRecordRaw;
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#define CXL_EVENT_RECORD_SIZE (sizeof(CXLEventRecordRaw))
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/*
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* Get Event Records output payload
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* CXL rev 3.0 section 8.2.9.2.2; Table 8-50
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*/
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#define CXL_GET_EVENT_FLAG_OVERFLOW BIT(0)
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#define CXL_GET_EVENT_FLAG_MORE_RECORDS BIT(1)
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typedef struct CXLGetEventPayload {
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uint8_t flags;
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uint8_t reserved1;
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uint16_t overflow_err_count;
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uint64_t first_overflow_timestamp;
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uint64_t last_overflow_timestamp;
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uint16_t record_count;
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uint8_t reserved2[0xa];
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CXLEventRecordRaw records[];
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} QEMU_PACKED CXLGetEventPayload;
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#define CXL_EVENT_PAYLOAD_HDR_SIZE (sizeof(CXLGetEventPayload))
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/*
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* Clear Event Records input payload
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* CXL rev 3.0 section 8.2.9.2.3; Table 8-51
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*/
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typedef struct CXLClearEventPayload {
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uint8_t event_log; /* CXLEventLogType */
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uint8_t clear_flags;
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uint8_t nr_recs;
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uint8_t reserved[3];
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uint16_t handle[];
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} CXLClearEventPayload;
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#endif /* CXL_EVENTS_H */
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